Stamped Component Carrier Structure for Precise Embedded Wiring

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Solution Overview

Problem

The increasing miniaturization and complexity of electronic components on component carriers, such as printed circuit boards, pose challenges in manufacturing electrically conductive connection structures with high precision and mechanical robustness, especially in embedding components and managing heat dissipation effectively.

Innovation Solution

A component carrier is designed with a stack comprising electrically conductive and insulating layer structures, where the insulating layer has a stamped surface profile, allowing for precise embedding of components and forming connections with low surface roughness and high aspect ratios, using Nanoimprint Lithography (NIL) materials for precise wiring and thermal management.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If electronic components are miniaturized and densely packed to increase functionality, then the number of components and connections increases, but manufacturing precision and heat dissipation become increasingly difficult

Engineering Contradiction:
Improveproduct functionalitiesVSAvoidmanufacturing precision
Core Design Contradiction:
Adaptability or versatilityVSManufacturing precision

Solution Approach 1:

The patent transitions from planar PCB layouts to three-dimensional stacked architectures, enabling vertical integration of multiple electronic components and interconnect layers. This dimensional change allows increased functionality without proportionally increasing manufacturing complexity, as connections are established through vertical vias and stacked interfaces rather than extensive lateral routing.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Solution Approach 2:

The patent implements nested structures where smaller electronic components and interconnect layers are embedded within and between larger structural layers. Multiple functional layers are nested vertically, with each layer containing conductors, insulators, and components that are integrated into the overall stacked architecture, enabling dense packing while maintaining manufacturability.

Inventive Principle:
Principle #7Nested doll (Nesting)

2Quantity of substance

If the spacing between contacts is reduced to increase component density, then more components fit on the carrier, but manufacturing precision and electrical reliability deteriorate

Engineering Contradiction:
Improvecomponent densityVSAvoidcontact spacing precision
Core Design Contradiction:
Quantity of substanceVSManufacturing precision

Solution Approach 1:

The patent moves contact arrangements from two-dimensional planar spacing to three-dimensional stacked configurations, where contacts are distributed across multiple vertical layers. This enables increased effective contact density without requiring tighter lateral spacing, as connections are established through vertical integration rather than lateral proximity.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Solution Approach 2:

The patent segments the contact structure into multiple discrete layers, with each layer containing a subset of the total contacts. This segmentation allows each layer to be manufactured with standard precision tolerances while achieving high overall contact density through the cumulative effect of multiple layers working together.

Inventive Principle:
Principle #1Segmentation

3Adaptability or versatility

If more electronic components are mounted on the component carrier to increase functionality, then heat generation increases, but heat dissipation becomes more difficult

Engineering Contradiction:
Improvecomponent countVSAvoidheat dissipation
Core Design Contradiction:
Adaptability or versatilityVSTemperature

Solution Approach 1:

The patent implements localized thermal management by integrating heat dissipation structures directly at the heat-generating component locations. Thermal vias and heat sinks are positioned locally beneath or adjacent to specific high-power components, creating targeted heat extraction paths rather than relying on passive overall heat dissipation, thereby managing temperature effectively as component count increases.

Inventive Principle:
Principle #3Local quality

4Ease of manufacture

If conventional manufacturing methods are used for embedding components, then the process is simpler, but manufacturing precision and electrical reliability are insufficient

Engineering Contradiction:
Improvemanufacturing simplicityVSAvoidembedding precision
Core Design Contradiction:
Ease of manufactureVSManufacturing precision

Solution Approach 1:

The patent performs preliminary formation of conductor patterns, via holes, and insulator layers in a standardized stacked sequence before component embedding. This preliminary structuring creates pre-configured receptacles and connection points that guide component placement and ensure precise embedding, thereby improving precision without significantly increasing overall manufacturing complexity.

Inventive Principle:
Principle #10Preliminary action

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach enables the manufacture of component carriers with high spatial accuracy, excellent electrical reliability, and efficient heat management, supporting high-frequency applications and complex wiring architectures while reducing signal losses and thermal stress.

Implementation Method 1

the at least one electrically insulating layer structure comprises at least one design layer structure having a stamped surface profile

Methodology Applied
Scientific EffectNanoimprint Lithography:

Data Source

PatentEP4307845A1Component carrier with stamped design layer structure and embedded component
Publication Date: 2024.01.17 AT & S AUSTRIA TECHNOLOGIE & SYSTEMTECHNIK AG
  • EP4307845A1 patent drawingFigure 1~4
  • EP4307845A1 patent drawingFigure 5~8
  • EP4307845A1 patent drawingFigure 9~11

AI summary

A component carrier (100) which comprises a stack (102) comprising at least one electrically conductive layer structure (104) and at least one electrically insulating layer structure (106), wherein the at least one electrically insulating layer structure (106) comprises at least one design layer structure (108, 110) having a stamped surface profile, and a component (112) being embedded in the stack (102) and being at least partially covered by the at least one design layer structure (108, 110).