Standalone Isolation Capacitor Structure for High-Voltage Field Balance
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Solution Overview
Problem
Previous galvanic isolation capacitor devices are costly, large in size, and have limited working voltages due to their integration within silicon-based integrated circuits and the use of polyimide/gold/polyimide/gold/polyimide transformers, which restrict their isolation capabilities and efficiency.
Innovation Solution
The development of standalone galvanic isolation capacitors with asymmetric areas and optimized pre-metal dielectric (PMD) and inter-level dielectric (ILD) thickness ratios, allowing for improved voltage isolation and reduced costs by integrating them on a common substrate within multi-chip modules.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If standalone galvanic isolation capacitors are used instead of embedded capacitors, then cost is reduced and isolation capability is improved, but device area increases
Solution Approach 1:
The capacitor structure is segmented into multiple layers (first dielectric layer, first metal layer, second dielectric layer, second metal layer) with asymmetric areas, allowing optimized space utilization and reduced overall device area while maintaining isolation capability
Solution Approach 2:
The capacitors are nested within the semiconductor substrate structure, with metal layers and dielectric layers integrated into the existing substrate architecture, minimizing additional area occupation
2Reliability
If asymmetric capacitor areas are used to balance electric fields, then working voltage is improved, but manufacturing complexity increases
Solution Approach 1:
The capacitor structure employs asymmetric areas where the first metal layer has a different area than the second metal layer, optimizing electric field distribution and enabling higher working voltages by balancing the voltage stress across series-connected capacitors
Solution Approach 2:
Different dielectric materials are used in different regions (first dielectric layer vs. second dielectric layer) to locally optimize electrical properties, with the second dielectric layer having different characteristics from the first to achieve field balancing
3Reliability
If optimized dielectric thickness ratios are implemented, then isolation capability is improved, but manufacturing precision requirements increase
Solution Approach 1:
The patent specifies optimized thickness ratios (first thickness to second thickness between 1:1 and 1.55:1) as key parameters to achieve balanced electric fields and improved isolation capability, transforming a complex multi-parameter optimization into a controlled parameter relationship
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach results in cost-effective, high-voltage isolation capacitors with enhanced working voltages and reduced size, effectively addressing the limitations of previous capacitor technologies by balancing electric fields and optimizing dielectric thickness ratios.
Implementation Method 1
balance the electric fields between the high-voltage capacitor and the low-voltage capacitor
Implementation Method 2
a pre-metal dielectric (PMD) layer, which is between the substrate and the bottom capacitor plate, to an interlayer dielectric (ILD) layer
Data Source
AI summary
A galvanic isolation capacitor device includes a semiconductor substrate and a PMD layer over the semiconductor substrate. The PMD layer has a first thickness. A lower metal plate is over the PMD layer and an ILD layer is on the lower metal plate; the ILD layer has a second thickness. A ratio of the first thickness to the second thickness is between about 1 and 1.55 inclusive. A first upper metal plate over the ILD layer has a first area and a second upper metal plate over the ILD layer has a second area; a ratio of the first area to the second area is greater than about 5. The galvanic isolation capacitor device can be part of a multi-chip module.