Backside Routing Layout for Standard Cell IC Flexibility

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Solution Overview

Problem

The miniaturization of integrated circuits poses challenges in design and manufacturing, particularly in ensuring stricter specifications and reliability, while existing electronic design automation tools struggle to optimize standard cell layout designs for efficient routing and manufacturing.

Innovation Solution

The proposed solution involves a layout design for integrated circuits that includes specific configurations of active regions, conductive lines, and via patterns on both the front-side and back-side of a substrate, allowing for increased routing flexibility and resources by electrically coupling active regions and gates, thereby enhancing manufacturing efficiency and performance.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If standard cell layout designs are used with conventional routing methods, then manufacturing simplicity is maintained, but routing flexibility and resources are insufficient

Engineering Contradiction:
Improverouting flexibilityVSAvoidlayout design complexity
Core Design Contradiction:
Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The patent introduces back-side routing layers in addition to the conventional front-side routing, effectively adding a new dimension for signal transmission. This allows routing paths to be established on both sides of the substrate, dramatically increasing routing flexibility and available resources without fundamentally changing the standard cell layout methodology on the front side.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Solution Approach 2:

The routing function is segmented between front-side and back-side layers, with each side handling specific routing tasks. This segmentation allows optimization of each layer independently while maintaining overall system simplicity, as each side can be designed and manufactured using adapted versions of conventional processes.

Inventive Principle:
Principle #1Segmentation

2Area of moving object

If miniaturization is pursued to reduce device size and power consumption, then functionality and speed improve, but design and manufacturing specifications become stricter

Engineering Contradiction:
Improvedevice areaVSAvoidmanufacturing specification strictness
Core Design Contradiction:
Area of moving objectVSManufacturing precision

Solution Approach 1:

By utilizing the back-side of the substrate for routing, the patent effectively doubles the available routing area without increasing the device footprint. This dimensional expansion provides more routing resources and flexibility within the same miniaturized area, reducing the strictness of manufacturing specifications required for front-side routing.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

3Adaptability or versatility

If more routing resources are provided to enhance performance, then routing flexibility improves, but device complexity increases

Engineering Contradiction:
Improverouting resourcesVSAvoidcircuit structure complexity
Core Design Contradiction:
Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The patent provides additional routing resources by utilizing the back-side of the substrate, effectively doubling the available routing area. This dimensional approach increases routing capacity without proportionally increasing device complexity, as the back-side routing can be implemented using adapted conventional processes.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Data Source

PatentUS20250022801A1Integrated circuit, system and method of forming same
Publication Date: 2025.01.16 TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD
  • US20250022801A1 patent drawing
  • US20250022801A1 patent drawing
  • US20250022801A1 patent drawing

AI summary

An integrated circuit includes a first and second power rail extending in a first direction and being on a first level of a back-side of a substrate, a first and second active region and a first conductive line. The first power rail is configured to supply a first supply voltage. The second power rail is configured to supply a second supply voltage. The first and second active region extend in the first direction, and are on a second level of a front-side of the substrate opposite from the back-side. The first active region is overlapped by the first power rail. The second active region is overlapped by the second power rail. The first conductive line extends in the second direction, is on a third level of the back-side of the substrate, and overlaps the first and second active region.