Standard Cell Row Layout With Boundary Power Routing

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Solution Overview

Problem

The increasing demand for high-performance, high-speed, and multifunctional semiconductor devices poses challenges in achieving improved integration density and reliability, as existing designs struggle to optimize the arrangement and connectivity of standard cells and power supply lines on semiconductor substrates.

Innovation Solution

A semiconductor device design featuring standard cells arranged in multiple row regions with varying heights and conductivity types, where power supply lines extend along boundaries and overlap adjacent regions, and active fins protrude from the substrate, allowing for efficient integration and connectivity without overlapping boundaries, and the use of dummy fins to optimize cell height and fin placement.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Quantity of substance

If standard cells are arranged in multiple row regions with boundaries, then integration density is improved, but power supply line routing complexity increases

Engineering Contradiction:
Improveintegration densityVSAvoidpower supply line routing complexity
Core Design Contradiction:
Quantity of substanceVSDevice complexity

Solution Approach 1:

The semiconductor device divides the active region into multiple row regions (first row region, second row region, third row region) separated by boundaries. Each row region contains standard cells arranged in rows, allowing independent power supply line routing for each region. This segmentation enables high integration density while managing routing complexity through regional organization.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

Power supply lines are routed in the first direction (lengthwise along boundaries) rather than only in the second direction (across rows). This dimensional change in routing approach allows power supply lines to extend along row boundaries and partially overlap adjacent row regions, simplifying the routing complexity while maintaining high integration density.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

2Manufacturing precision

If active fins are spaced apart without overlapping boundaries, then manufacturing precision is improved, but area utilization decreases

Engineering Contradiction:
Improvefin placement precisionVSAvoidarea utilization
Core Design Contradiction:
Manufacturing precisionVSArea of stationary object

Solution Approach 1:

Active fins are spaced apart from boundaries in some locations (where boundaries are present) while being densely packed in other locations (within row regions away from boundaries). This local variation in fin spacing maintains manufacturing precision near boundaries while maximizing area utilization within the interior of row regions.

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

The active region is segmented into multiple row regions with boundaries, creating distinct zones where fin spacing rules can be applied differently. Within each row region, fins are arranged with appropriate spacing from boundaries to ensure manufacturing precision, while the segmented structure allows efficient use of available area.

Inventive Principle:
Principle #1Segmentation

3Adaptability or versatility

If power supply lines overlap adjacent row regions, then connectivity is improved, but manufacturing complexity increases

Engineering Contradiction:
ImproveconnectivityVSAvoidmanufacturing complexity
Core Design Contradiction:
Adaptability or versatilityVSDevice complexity

Solution Approach 1:

Power supply lines extend in the first direction (lengthwise) along row boundaries and partially overlap adjacent row regions, rather than being confined to single rows. This dimensional extension improves connectivity across multiple row regions while the systematic routing along boundaries keeps manufacturing complexity manageable.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Solution Approach 2:

Power supply lines serve multiple functions: they provide power to standard cells within their own row region and simultaneously provide power to adjacent row regions through partial overlap. This multi-functionality improves connectivity while the unified routing approach along boundaries reduces manufacturing complexity.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Data Source

PatentUS11741285B2Semiconductor device and method of manufacturing the same
Publication Date: 2023.08.29 SAMSUNG ELECTRONICS CO LTD
  • US11741285B2 patent drawing
  • US11741285B2 patent drawing
  • US11741285B2 patent drawing

AI summary

A semiconductor device includes a substrate having an active region, first standard cells arranged in a first row on the active region, second standard cells arranged in a second row on the active region and having a first boundary with the first standard cells, a third standard cells arranged in a third row on the active region and having a second boundary with the first standard cells, and a plurality of power supply lines, respectively arranged along boundaries. Each of the first to third standard cells includes a plurality of fin patterns extending in the first direction, and the plurality of fin patterns are arranged in a second direction, so as not to be disposed on at least one boundary, among the first and second boundaries.