Standard Cell Capacitance Matching for Fast IC Simulation
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Solution Overview
Problem
Existing SPICE simulation methods are inadequate for ultra-large-scale digital integrated circuits due to exponential growth in time and memory requirements, leading to significant errors in analysis results, especially under advanced manufacturing processes.
Innovation Solution
A dynamic capacitance matching method using characterization libraries and symbolic computation to simulate integrated circuits, reducing simulation time and achieving accuracy comparable to SPICE with 1% error, utilizing standard cell databases and unit network division for efficient simulation.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If SPICE simulation is used for ultra-large-scale digital integrated circuits, then simulation accuracy is maintained, but simulation time and memory space requirements exponentially increase
Solution Approach 1:
The patent segments the circuit into standard cells and divides the capacitance range into discrete levels. Each standard cell is pre-simulated at multiple capacitance values to generate lookup tables, which are then used during actual analysis. This segmentation transforms the exponential complexity into manageable discrete cases, achieving both accuracy and speed.
Solution Approach 2:
The patent performs preliminary simulations of standard cells at various capacitance values before actual circuit analysis. These pre-computed results are stored in lookup tables that can be quickly queried during timing and power analysis, eliminating the need for real-time SPICE simulation of the entire circuit.
2Measurement precision
If SPICE simulation is used for ultra-large-scale digital integrated circuits, then simulation accuracy is maintained, but memory space requirements exponentially increase
Solution Approach 1:
The patent segments the continuous capacitance parameter into discrete levels and segments circuits into standard cells. This creates a finite set of lookup tables that can be stored in memory, replacing the need for unlimited memory to store complete SPICE simulation results for all possible circuit states.
Solution Approach 2:
The patent creates simplified models (characterization equations) that copy the essential behavior of standard cells without reproducing the full complexity of SPICE simulations. These simplified models use lookup tables with pre-computed values, reducing memory requirements while maintaining accuracy.
3Productivity
If existing EDA tools (NLDM, CCS, ECSM, SPA, FF) are used for timing and power analysis, then analysis speed is improved, but measurement precision deteriorates with significant errors
Solution Approach 1:
The patent uses feedback from pre-computed SPICE simulations to generate characterization equations that feed into the analysis process. The lookup tables are populated with accurate SPICE results, and these results are used to correct and refine subsequent timing and power analysis, maintaining high precision while achieving fast analysis speeds.
Data Source
AI summary
The present disclosure discloses a method for dynamically matching capacitors in integrated circuits, a simulation device and a storage medium. The method includes obtaining a standard cell database, obtaining the circuit netlist data to be analyzed, dividing and forming multiple unit networks based on a single standard cell and the corresponding load circuit included in the circuit netlist data, identifying the standard cell model in the unit network, obtaining the corresponding pre-simulation data group from the standard cell database according to the standard cell model, simulating the unit network based on the pre-simulation data group, and obtaining the output voltage curve data and/or the output current curve data of the unit network.