Standard Cell Layout Method for Consistent Polysilicon Gate Pitch

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Solution Overview

Problem

Differences in gate lengths of standard cells in integrated circuits lead to errors in key graphic dimensions during production, affecting the performance of the integrated circuit.

Innovation Solution

A layout method where the distance between the polysilicon gate and virtual polysilicon gates in each standard cell is adjusted based on a first pitch determined from the standard cell with the maximum gate length, ensuring consistent spacing across all standard cells, thereby reducing errors in key graphic dimensions and improving performance.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If standard cells with different gate lengths are used in integrated circuit design, then design flexibility and functionality are improved, but manufacturing precision deteriorates due to large errors in key graphic dimensions

Engineering Contradiction:

Improvedesign flexibilityVSAvoidkey graphic dimension accuracy

Core Design Contradiction:

Adaptability or versatilityVSManufacturing precision

Solution Approach 1:

The patent changes the pitch parameter of standard cells with different gate lengths to a unified target pitch value. By adjusting the pitch (distance between adjacent standard cells) based on the gate length of each standard cell, all standard cells are made to occupy the same horizontal space regardless of their gate length differences, thereby resolving the contradiction between design flexibility and manufacturing precision

Inventive Principle:

Principle #35Parameter changes

Solution Approach 2:

The patent introduces asymmetric pitch adjustment where the pitch between standard cells is not uniform but is specifically calculated based on each standard cell's gate length. The pitch is asymmetrically distributed to ensure that standard cells with different gate lengths still occupy equal horizontal space, maintaining manufacturing precision while allowing functional diversity

Inventive Principle:

Principle #4Asymmetry

2Adaptability or versatility

If standard cells with different gate lengths are placed in the integrated circuit, then circuit functionality is improved, but device complexity increases due to inconsistent space occupation

Engineering Contradiction:

Improvecircuit functionalityVSAvoidlayout complexity

Core Design Contradiction:

Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The patent creates a universal pitch standard (target pitch) that applies to all standard cells regardless of their gate length. This universal pitch rule simplifies the layout process by providing a single reference value for pitch adjustment, reducing layout complexity while still allowing different standard cells to perform their specific functional roles

Inventive Principle:

Principle #6Universality (Multi-functionality)

Data Source

PatentUS11544439B2Integrated circuit having each standard cell with same target pitch and layout method thereof

Publication Date: 2023.01.03 CHANGXIN MEMORY TECH INC

AI summary

Embodiments of the present application provide an integrated circuit and a layout method thereof. First, a first pitch of a first standard cell having a maximum gate length in multiple standard cells in an integrated circuit is determined. The first pitch is a distance between a central axis of a polysilicon gate in the first standard cell and central axes of virtual polysilicon gates in the first standard cell. Then, a distance between a polysilicon gate and virtual polysilicon gates in each of the standard cells is adjusted by using the first pitch and a gate length of each of the standard cells. After the adjustment, a distance between a central axis of the polysilicon gate in each of the standard cells and central axes of the virtual polysilicon gates in each of the standard cells is the same as the first pitch.