Standard Cell Library Characteristic Adjustment for Design Rule Compliance
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Solution Overview
Problem
As semiconductor process technology advances, integrating a large number of transistors in a small area leads to design rule violations due to differences in operating conditions among functional blocks in a system-on-chip (SOC), causing performance degradation and yield reduction.
Innovation Solution
A standard cell library is generated with characteristic information for each standard cell, and a characteristic change region is detected to update the library by changing the characteristics of standard cells to match adjacent cells, preventing design rule violations and improving semiconductor device performance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If standard cells with different characteristics are placed adjacent to each other, then functional blocks can operate under different optimal operating conditions, but design rule violations occur due to characteristic differences
Solution Approach 1:
The patent applies local quality by detecting characteristic change regions where standard cells with different characteristics are placed adjacent to each other, and then changing the characteristic of at least one standard cell in such regions to match adjacent cells. This allows different functional blocks to operate under different optimal conditions while preventing design rule violations through localized characteristic adjustment.
Solution Approach 2:
The patent changes the characteristic parameter of standard cells in characteristic change regions. By comparing characteristics of standard cells and changing the characteristic of at least one cell in regions where adjacent cells have different characteristics, the patent resolves design rule violations while maintaining operational adaptability.
2Quantity of substance
If transistors are downscaled to increase integration density, then more transistors can be integrated in a unit area, but design rule violations increase due to stricter manufacturing constraints
Solution Approach 1:
The patent performs preliminary action by detecting characteristic change regions and changing standard cell characteristics before final placement. This preventive approach identifies and resolves potential design rule violations early in the design process, allowing high-density transistor integration without compromising manufacturing compliance.
Solution Approach 2:
The patent implements feedback by detecting characteristic differences between adjacent standard cells and using this information to change characteristics of cells in characteristic change regions. This feedback mechanism ensures design rule compliance while maintaining high integration density.
3Reliability
If characteristic changes are made to prevent design rule violations, then manufacturing compliance improves, but placement flexibility is reduced
Solution Approach 1:
The patent applies local quality by making characteristic changes only in specific characteristic change regions where design rule violations would occur, rather than uniformly across all standard cells. This localized approach maintains manufacturing compliance while preserving placement flexibility in regions where it is not needed.
Solution Approach 2:
The patent changes characteristics of standard cells selectively in characteristic change regions based on the specific design rules that would be violated. This targeted parameter change approach ensures manufacturing compliance while minimizing impact on overall placement flexibility.
Data Source
AI summary
A method of designing a semiconductor integrated circuit (IC) is provided as follows. A standard cell library is generated. The standard cell library includes characteristic information for a plurality of standard cells. The characteristic information includes a characteristic of each standard cell. A characteristic change region is detected. The characteristic change region includes at least one of the plurality of standard cells by comparing characteristics of standard cells to be placed adjacent to the characteristic change region, based on the standard cell library. A characteristic of the at least one standard cell included in the detected characteristic change region is changed to one of the characteristics of the standard cells to be placed adjacent to the characteristic change region to update the standard cell library. A plurality of standard cells of the updated standard cell library is placed.


