Standing Chip Scale Package Vertical Mounting
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Solution Overview
Problem
Conventional chip scale packages are complex, inefficient, and difficult to produce at low cost, often requiring complicated fabrication processes and lacking clear visibility of solder joints and reduced printed circuit board mounting area.
Innovation Solution
A standing chip scale package with contacts on both sides of the chip, allowing perpendicular mounting to a printed circuit board, featuring solder balls for electrical connection and a simplified manufacturing process involving wafer preparation and dicing, enabling batch handling and clear solder joint visibility.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If conventional chip scale packages use coplanar electrode arrangement, then electrical connection to PCB is achieved, but device complexity increases and manufacturing becomes complicated
Solution Approach 1:
The patent inverts the conventional coplanar arrangement by positioning electrodes on opposite sides of the chip (front and back surfaces) rather than all on one side. This inversion simplifies the package structure by eliminating the need for complex leadframes and extended clips, while maintaining electrical connection capability to the PCB through the vertical configuration.
Solution Approach 2:
The patent transitions from a two-dimensional coplanar electrode arrangement to a three-dimensional vertical configuration. electrodes are distributed across the front and back surfaces of the chip, utilizing the vertical dimension to achieve electrical connection, thereby simplifying the overall package structure and manufacturing process.
2Reliability
If drain contact is connected to top electrode by diffusion sinker, then electrical connection is achieved, but resistance increases and active area reduces
Solution Approach 1:
The patent removes the diffusion sinker structure from the device architecture. Instead of using a diffusion sinker to connect the drain contact to the top electrode, the invention directly connects electrodes through the vertical chip structure, eliminating the harmful resistance and active area reduction caused by the diffusion sinker.
3Area of stationary object
If soldered chip is mounted flat on PCB, then electrical connection is achieved, but solder joint visibility is poor and mounting area increases
Solution Approach 1:
The patent inverts the conventional flat mounting configuration by enabling the chip to be mounted vertically in a standing position on the PCB. This inversion allows solder joints to be visually accessible from the side, improving detectability while reducing the PCB footprint compared to flat mounting.
Solution Approach 2:
The patent utilizes the vertical dimension for mounting the chip in a standing configuration rather than flat placement. This dimensional change enables side-visibility of solder joints for inspection purposes and reduces the horizontal mounting area required on the PCB.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution provides efficient electrical connection to both sides of the chip, allows for clear visualization of solder joints, and reduces the printed circuit board mounting area, while simplifying the manufacturing process for low-cost production.
Implementation Method 1
electroless Ni/Au plating the contacts and the exposed back metal of each chip to form under bump metallization layers
Data Source
AI summary
A standing chip scale package is disclosed. The standing chip scale package provides electrical connection to bumped device contacts on both sides of the chip. The package is coupleable to a printed circuit board in a standing configuration such that front and back sides of the bumped chip are substantially perpendicular to a mounting surface. A process of fabricating the standing chip scale package is also disclosed.