Automated Star Routing for IC Power Distribution

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Solution Overview

Problem

The existing manual and labor-intensive process of designing and routing non-shared one-to-many conductive pathways in integrated circuits is inefficient, requiring significant manual effort and lacking automated validation, leading to productivity constraints and potential electrical violations.

Innovation Solution

An automated scripted star routing methodology using the 'star_route' command and physical verification tools to create and validate non-shared routes between a common pad and circuit blocks, with constraints for width and layer control, and validation for routing quality.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Manufacturing precision

If manual routing methodology is used to create non-shared conductive pathways, then routing precision and compliance with voltage/resistance requirements can be achieved, but designer productivity and efficiency deteriorate due to labor-intensive work

Engineering Contradiction:
Improverouting precisionVSAvoiddesigner productivity
Core Design Contradiction:
Manufacturing precisionVSProductivity

Solution Approach 1:

The system performs self-validation of routed paths by automatically detecting electrical overlaps and potential violations without requiring external verification tools or manual checking, thereby maintaining precision while improving productivity

Inventive Principle:
Principle #25Self-service

Solution Approach 2:

The system provides immediate feedback during the routing process by detecting potential violations and electrical overlaps, allowing designers to correct issues before finalizing the routing, thus maintaining high precision without increasing manual effort

Inventive Principle:
Principle #23Feedback

2Reliability

If manual routing is performed to ensure non-shared pathways, then electrical compliance is achieved, but design iteration time increases when floorplan changes occur

Engineering Contradiction:
Improveelectrical complianceVSAvoiddesign iteration time
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The system performs preliminary detection of potential violations and electrical overlaps during the routing process itself, rather than requiring separate validation steps after floorplan changes, thus maintaining reliability while reducing iteration time

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The system provides real-time feedback during routing about potential compliance issues, allowing designers to make immediate adjustments without requiring complete re-routing when floorplan changes occur

Inventive Principle:
Principle #23Feedback

3Productivity

If conventional automated routing tools are used to route the entire integrated circuit, then routing speed improves, but the ability to create separate non-shared interconnections deteriorates

Engineering Contradiction:
Improverouting speedVSAvoidrouting flexibility
Core Design Contradiction:
ProductivityVSAdaptability or versatility

Solution Approach 1:

The system segments the routing process by allowing designers to select and route specific subsets of the integrated circuit separately, while maintaining the ability to enforce non-sharing constraints within each subset, thus achieving both speed and flexibility

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The system applies different routing constraints and validation rules to different segments or subsets of the circuit, allowing local optimization and non-shared routing requirements to be met while maintaining overall routing efficiency

Inventive Principle:
Principle #3Local quality

4Measurement precision

If traditional connectivity extraction tools are used for validation, then topology verification is performed, but detection of electrical overlaps and violations deteriorates

Engineering Contradiction:
Improvetopology verificationVSAvoidelectrical overlap detection
Core Design Contradiction:
Measurement precisionVSDifficulty of detecting and measuring

Solution Approach 1:

The system performs self-validation by automatically detecting electrical overlaps and potential violations within the routed paths without requiring external verification tools, thereby improving detection capability while maintaining topology verification

Inventive Principle:
Principle #25Self-service

Solution Approach 2:

The system provides feedback about electrical overlaps and potential violations during the routing process, enabling detection of issues that traditional connectivity extraction tools would miss

Inventive Principle:
Principle #23Feedback

Data Source

PatentUS10210301B2System and method for implementing and validating star routing for power connections at chip level
Publication Date: 2019.02.19 CADENCE DESIGN SYST INC
  • US10210301B2 patent drawing
  • US10210301B2 patent drawing
  • US10210301B2 patent drawing

AI summary

A system, method, and computer program product for automating the design and routing of non-shared one-to-many conductive pathways between a common pad and circuit blocks in an integrated circuit. Such pathways are routinely required for power and signal distribution purposes. Automated scripts perform a star routing methodology and validate the routing results. The methodology processes input width and layer constraints and from-to's denoting start and end points for each route by invoking a star_route command in a router that implements interconnections as specified. Routing results are validated by checking for routing violations, including shared segments and width violations. Violations are marked for correction.