Startup Circuit Using Dual Clock Generators for Stable Oscillation Verification
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Solution Overview
Problem
Electronic devices face startup malfunctions due to unstable supply voltage and system clock parameters during power-on, as immediate activation of digital circuitry can lead to malfunctions if these parameters do not settle properly.
Innovation Solution
A startup circuit with a first clock generator and a second clock generator, where the second clock is enabled only after reaching a predetermined threshold of stable oscillations, ensuring digital circuitry is not malfunctioned by unstable oscillations during startup.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Loss of time
If the second clock is enabled immediately upon power on, then the startup time is reduced, but the digital circuitry may malfunction due to unstable oscillations
Solution Approach 1:
The patent applies preliminary action by using the first clock to verify stable oscillations of the second clock before enabling it to clock the digital circuitry. The counter circuit counts oscillations of the second clock during the first clock period, and only when a threshold is met (indicating stability) is the second clock enabled. This preliminary verification prevents malfunctions while managing startup timing.
2Reliability
If the first clock period is made longer to ensure stable oscillations, then the reliability of digital circuitry operation is improved, but the startup time increases
Solution Approach 1:
The patent uses parameter changes by adjusting the threshold value that the counter must reach to enable the second clock. By tuning this threshold parameter, the system balances between verifying sufficient oscillation stability (for reliability) and limiting the verification duration (to minimize startup time). This parameter optimization resolves the contradiction between thorough verification and quick startup.
Data Source
AI summary
A startup circuit is disclosed operable to perform a startup operation for an electronic device comprising digital circuitry. The startup circuit comprises a first clock generator operable to generate a first clock comprising a first period, and a second clock generator operable to generate a second clock independent of the first clock. The second clock is operable to clock the digital circuitry and comprises a second period less than the first period. A first counter counts a first number of the second periods over the first period, and the second clock is enabled to clock the digital circuitry in response to the first counter.