State Machine Element Pairing for Parallel Compiler Optimization
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Solution Overview
Problem
Current compiler technologies for parallel machines face inefficiencies in converting source code into machine code, particularly in implementing finite state machines, due to limitations in state machine element connectivity and optimization of regular expression matching architectures.
Innovation Solution
A compiler that groups state machine elements into pairs sharing a common output, generating a netlist based on physical design to optimize connectivity and implement finite state machines efficiently, utilizing programmable switches to route signals and configure special purpose elements like counters and logic gates.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If state machine elements are implemented with standard connectivity patterns, then the implementation is simpler, but hardware resource utilization is inefficient
Solution Approach 1:
The patent changes the connectivity parameters of state machine elements by grouping them into pairs that share common input and output connections. This parameter modification allows two state machine elements to be implemented using shared hardware resources, thereby improving hardware resource utilization without significantly complicating the implementation process.
2Adaptability or versatility
If more state machine elements are used to implement complex finite state machines, then functionality is improved, but memory requirements increase
Solution Approach 1:
The patent merges the hardware resources of paired state machine elements by sharing their input and output connections. This combining approach allows complex finite state machine functionality to be implemented with fewer physical hardware resources, thereby reducing memory requirements while maintaining adaptability and versatility.
3Adaptability or versatility
If state machine elements are fully connected to all other elements, then connectivity flexibility is improved, but device complexity increases
Solution Approach 1:
The patent creates universal input and output connection points that serve multiple paired state machine elements simultaneously. These shared connections provide multi-functionality, allowing the same physical connection to serve multiple logical purposes, thereby maintaining connectivity flexibility while reducing netlist complexity.
Data Source
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AI summary
Embodiments of a system and method for generating an image configured to program a parallel machine from source code are disclosed. One such parallel machine includes a plurality of state machine elements (SMEs) grouped into pairs, such that SMEs in a pair have a common output. One such method includes converting source code into an automaton comprising a plurality of interconnected states, and converting the automaton into a netlist comprising instances corresponding to states in the automaton, wherein converting includes pairing states corresponding to pairs of SMEs based on the fact that SMEs in a pair have a common output. The netlist can be converted into the image and published.