Integrity Checking for State Machine Sequencing
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Solution Overview
Problem
Existing integrity check mechanisms for electronic circuits are vulnerable to fault injection attacks, particularly when the sequencing of program execution is not deterministic, leading to security issues and complications in program updates, as they require predictable program code and are sensitive to statistical power analysis attacks.
Innovation Solution
The solution involves assigning checking bits to storage elements that are set to an active state during access, multiplying or combining the calculation result with these bits to ensure integrity, even if the execution is desynchronized, thereby making the result unexploitable if any step is missed due to a fault injection attack.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a conventional integrity check mechanism is used (comparing input with inverse calculation result), then the security against fault injection attacks is improved, but the mechanism becomes vulnerable when program execution sequencing is non-deterministic
Solution Approach 1:
The patent segments the integrity verification process into two independent components: (1) functional correctness verification through inverse calculation, and (2) execution sequencing verification through signature comparison. This segmentation allows each component to address specific aspects of integrity independently, making the overall system adaptable to non-deterministic execution while maintaining reliability.
Solution Approach 2:
The patent introduces an intermediary signature verification mechanism that mediates between the functional calculation and the final result output. The signature, calculated independently of execution timing, serves as an intermediary reference that verifies whether the correct program instructions were executed, bridging the gap between deterministic verification needs and non-deterministic execution reality.
2Reliability
If signature-based integrity checking is implemented, then protection against non-deterministic execution is improved, but program updates become complicated and security against statistical power analysis attacks worsens
Solution Approach 1:
The patent applies preliminary action by pre-calculating and storing the signature of the program instructions in a read-only memory during the circuit manufacturing process. This preliminary preparation eliminates the need for complex runtime signature generation and simplifies program updates, as only the program data needs to be updated while the signature remains a fixed reference.
3Reliability
If deterministic program execution is enforced for signature prediction, then signature-based checking works, but the circuit becomes vulnerable to statistical power analysis attacks
Solution Approach 1:
The patent applies dynamics by allowing the program execution to be non-deterministic in terms of timing while maintaining determinism in terms of instructional sequence verification. The signature mechanism verifies that the correct instructions were executed regardless of when they were executed, enabling dynamic execution schedules while maintaining verification reliability.
Data Source
AI summary
A method and a circuit for protecting the execution of a calculation by an electronic circuit, conditioning a result of the calculation to states of bits indicative of executions of steps of access in read mode and/or in write mode to storage elements.