State Machine Engine Overflow Control for Parallel Pattern Recognition
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Solution Overview
Problem
Current computing systems face challenges in efficiently performing pattern recognition tasks due to the increasing volume of data and the number of patterns to be identified, leading to computing bottlenecks and delays.
Innovation Solution
The implementation of a state machine engine with a hierarchical parallel configuration of finite state machine (FSM) lattices, which allows for simultaneous analysis of data streams across multiple criteria, enhancing processing speed and efficiency.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If a large number of circuits operate in parallel to search a data stream for patterns, then the pattern recognition capability is improved, but the device complexity increases
Solution Approach 1:
The patent segments the pattern recognition task into multiple independent circuits, each responsible for detecting a specific pattern in the data stream. This segmentation allows parallel processing of multiple patterns simultaneously, improving overall recognition capability while maintaining manageable complexity through modular design
Solution Approach 2:
The patent designs circuits with multi-functional capabilities where the same hardware infrastructure supports multiple pattern detection functions. This universality allows the system to handle various patterns using a common parallel circuit architecture, improving productivity without proportionally increasing device complexity
2Device complexity
If patterns are searched one at a time in a data stream, then the device complexity is reduced, but the productivity decreases due to computing bottlenecks
Solution Approach 1:
The patent divides the single sequential search function into multiple segmented circuits that operate in parallel, each handling a portion of the pattern recognition task. This segmentation transforms the sequential processing bottleneck into concurrent parallel operations, significantly improving productivity
Solution Approach 2:
The patent transitions from one-dimensional sequential processing to multi-dimensional parallel processing by introducing multiple circuits operating simultaneously. This dimensional change in the processing architecture enables multiple patterns to be searched at once, overcoming the productivity limitations of sequential search
Data Source
AI summary
State machine engines are disclosed, including those having an inter-rank bus control system, which may include a register. The state machine engine may include a plurality of configurable elements, such that each of the plurality of configurable elements comprises a plurality of memory cells. These cells may analyze data and output a result of the analysis. The IR bus control system may halt a write operation of data to be analyzed by the cells based, at least in part, on one or more conditions.