Table-Based State Machine Pipelining for Faster Parallel Input Processing
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Solution Overview
Problem
Table-based state machines face performance limitations due to sequential processing and slow memory access, which hinder parallelization and high clock frequency operations.
Innovation Solution
The implementation of a high-performance table-based state machine that reduces dependence on the current state by using a state table circuit to read all possible current states and an output multiplexer to select the next state and output, allowing pipelining of state table reads and enabling parallel processing of multiple inputs.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If traditional table-based state machine uses sequential processing with current state dependence, then implementation is simple, but performance is limited and clock frequency is slow
Solution Approach 1:
The patent segments the state machine processing into multiple parallel input units, where each unit independently processes inputs without depending on the current state. This segmentation allows simultaneous processing of multiple inputs, dramatically improving productivity while distributing the complexity across modular units rather than concentrating it in a single sequential path.
Solution Approach 2:
The patent implements preliminary action by pre-computing and storing all possible next states and outputs for each input in state table circuits before processing begins. This eliminates the need for sequential lookup during operation, allowing all possible transitions to be evaluated in parallel and the correct one selected immediately, thus improving processing speed without proportionally increasing circuit complexity.
2Productivity
If table lookup is performed for each iteration depending on current state, then implementation is straightforward, but latency is high and parallelization is hindered
Solution Approach 1:
The patent divides the state machine into multiple independent input units that can process inputs in parallel. Each input unit has its own state table circuit that can be read simultaneously with other units, enabling true parallel processing. This segmentation eliminates the sequential dependency that caused latency in traditional designs.
Solution Approach 2:
The patent performs preliminary action by pre-loading all possible state transitions into state table circuits before processing begins. This allows the system to quickly select the correct next state and output through simple multiplexer selection rather than performing sequential table lookups during operation, significantly reducing latency while enabling parallel processing across multiple input units.
3Productivity
If all possible current states are read from state table circuit, then pipelining is enabled and latency is hidden, but output multiplexer size increases
Solution Approach 1:
The patent applies preliminary action by pre-computing and storing all possible next states and outputs for each input combination in the state table circuits before processing begins. This allows the system to read all possible current states in parallel and use simple multiplexer selection to choose the correct next state and output, enabling extensive pipelining and hiding latency without requiring excessively large multiplexers during operation.
Solution Approach 2:
The patent introduces an intermediary mechanism where state table circuits pre-compute and store transition information, acting as a buffer between the input and the multiplexer. This intermediary layer allows the multiplexer to simply select from pre-computed values rather than performing complex real-time calculations, enabling high clock frequencies while keeping multiplexer size manageable through efficient encoding.
Data Source
AI summary
A table-based state machine is improved by reducing critical dependence path. In one aspect, all current states for a given input are read from a state table circuit, and the next state and output are then selected therefrom by an output multiplexer based on the current state, removing dependence on the current state from the table read, and allowing the read(s) to be pipelined. In a further aspect, multiple input units are configured to operate on multiple inputs in parallel, with each input unit propagating its state table circuit for its current input to the next downstream input unit. Each downstream input unit is configured to use the propagated state table circuit to provide the state table circuit reads to the proper output multiplexer input. The number of possible output states for a given input may be dynamically reduced, reducing the size of the output multiplexer selecting the next state.