State Machine Result Memory for Parallel Pattern Recognition
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Solution Overview
Problem
Conventional computing systems face inefficiencies in pattern recognition tasks due to the increasing volume of data and number of patterns to be identified, leading to bottlenecks in processing speed and data stream analysis.
Innovation Solution
A processor-based system employing a state machine engine with finite state machine lattices arranged in a hierarchical parallel configuration, allowing multiple FSMs to analyze data in parallel and cascade outputs for complex pattern recognition, enabling high-speed processing of large data streams.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If conventional computing systems process pattern recognition sequentially, then system complexity is reduced, but processing speed and productivity deteriorate due to bottlenecks
Solution Approach 1:
The system segments pattern recognition into multiple independent finite state machines (FSMs), each capable of processing patterns in parallel. This segmentation allows the system to divide the complex pattern recognition task into smaller, manageable units that can operate simultaneously, thereby increasing processing speed without proportionally increasing overall system complexity.
Solution Approach 2:
The patent transitions from sequential processing (one-dimensional time) to parallel processing by introducing multiple FSMs operating simultaneously. This dimensional change from sequential to parallel architecture enables the system to process multiple patterns at once, dramatically improving productivity while managing complexity through standardized FSM components.
2Speed
If multiple circuits operate in parallel to search data stream, then processing speed improves, but device complexity increases and adequate data processing capacity is not achieved
Solution Approach 1:
Each finite state machine in the parallel architecture is designed as a universal processing unit capable of handling different pattern recognition tasks. This multi-functionality allows the same circuit design to be replicated and configured for different patterns, improving data processing speed while avoiding the complexity of designing unique circuits for each pattern.
Solution Approach 2:
The system achieves flexibility and reduced complexity by changing parameters of the FSM configuration rather than altering the fundamental circuit architecture. Each FSM can be programmed with different transition tables and state definitions to recognize different patterns, allowing parallel processing of multiple patterns without increasing hardware complexity.
3Loss of time
If sequential pattern searching is performed, then system simplicity is maintained, but loss of time increases due to delayed processing of data streams
Solution Approach 1:
The system performs preliminary actions by pre-configuring multiple FSMs with their respective pattern recognition logic before data stream processing begins. This allows the system to immediately start parallel pattern recognition without sequential setup delays, significantly reducing time loss and improving overall productivity in data stream processing.
Data Source
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AI summary
A state machine engine (14) includes a storage element, such as a (e.g., match) results memory (150). The storage element (150) is configured to receive a result of an analysis of data. The storage element (150) is also configured to store the result in a particular portion of the storage element (150) based on a characteristic of the result. The storage element (150) is additionally configured to store a result indicator corresponding to the result. Other state machine engines (14) and methods are also disclosed.