State-Machine Trim DAC for ±0.5 LSB Major Transitions
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Existing digital-to-analog converters (DACs) face challenges in achieving precise signal conversion due to manufacturing variations, leading to differential non-linearity issues, which current trimming methods struggle to fully address, especially in achieving accuracy within one Least Significant Bit (LSB).
Innovation Solution
A trim circuit controlled by a state machine, comprising a Trim-DAC (T-DAC), measures the analog output relative to a reference signal to adjust digital-to-analog conversions, using an undersize fraction to form a rectangular distribution of the analog output within ±0.5 LSB, with settings stored in nonvolatile memory for all digital input combinations, allowing for precise correction of manufacturing variations.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If conventional trimming methods are used to correct manufacturing variations, then some accuracy improvement is achieved, but the conversion time increases and accuracy within ±0.5 LSB cannot be guaranteed
Solution Approach 1:
The patent applies preliminary action by pre-calculating and storing optimal trim values in a lookup table during manufacturing. The trim circuit retrieves pre-determined correction values based on measured device characteristics, eliminating the need for time-consuming real-time calculations during conversion operations. This ensures both high accuracy within ±0.5 LSB and fast conversion times.
Solution Approach 2:
The patent replaces iterative mechanical adjustment methods with a digital lookup table approach. Instead of using time-consuming trial-and-error trimming procedures, the system uses pre-computed digital values stored in memory, which are quickly retrieved and applied to correct manufacturing variations, significantly reducing conversion time while maintaining high precision.
2Measurement precision
If iterative trimming procedures are used to achieve high precision, then accuracy within ±0.5 LSB can be achieved, but the trimming process becomes too slow for practical applications
Solution Approach 1:
The patent performs the time-consuming trimming calculations in advance during manufacturing and stores the results in a lookup table. During actual operation, the pre-computed trim values are simply retrieved based on the measured device parameters, achieving both high precision (±0.5 LSB) and fast trimming speed without iterative procedures.
Solution Approach 2:
The patent creates a digital copy of the optimal trim values in a lookup table that can be quickly accessed during operation. Instead of repeatedly performing complex calculations, the system uses this pre-created digital replica of the solution, enabling fast retrieval and application of precise correction values for different device variations.
3Manufacturing precision
If the trim range is reduced to focus on minor corrections, then conversion accuracy improves, but the circuit becomes less adaptable to different DAC applications
Solution Approach 1:
The patent applies local quality by using different trim strategies for different parts of the output range. The lookup table contains specialized correction values tailored to specific regions of the DAC output, allowing optimal accuracy for each local region while maintaining overall adaptability. This enables precise correction for both small and large trim requirements across different DAC applications.
Data Source
Figure 1A~1C
Figure 1D~2B
Figure 3~4
AI summary
A trim DAC wherein the digital input bits to the trim DAC are controlled by a state machine to produce an analog output that is within a least significant bit of the digital input bits. An undersize factor between digital input bits is used to assist in finding a trim solution for major transitions of the digital input bits. Trim solutions are stored in a nonvolatile memory associated with the state machine to be used in creating an accurate analog output.