Variable Bit Width State Transition Memory Management

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Solution Overview

Problem

The existing state transition management devices face inefficiencies in memory usage due to fixed data bit widths for storing state transition rules, leading to unnecessary memory allocation and underutilization, especially when the number of branches varies across states.

Innovation Solution

A state transition management device that includes a memory, a selection method specifying unit, and a selection circuit, which allows for dynamic selection of subsequent state number candidates based on the current state number and event identification codes, optimizing memory usage by varying the number of candidates stored per memory access.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Ease of manufacture

If fixed data bit widths are used for storing state transition rules in memory, then the memory structure is simple and easy to implement, but memory usage efficiency deteriorates due to unnecessary memory allocation and underutilization

Engineering Contradiction:
Improvememory structure simplicityVSAvoidmemory usage efficiency
Core Design Contradiction:
Ease of manufactureVSLoss of energy

Solution Approach 1:

The patent applies dynamics by making the data bit width variable rather than fixed. The memory system dynamically adjusts the number of subsequent state number candidates stored per memory access based on the current state number, allowing the storage capacity to adapt to different states' requirements and eliminate wasted memory space.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The patent changes the parameter of data bit width from a fixed value to a variable that depends on the current state number. By varying the number of subsequent state number candidates stored in each memory access according to the current state, the system optimizes memory utilization without complicating the overall memory structure.

Inventive Principle:
Principle #35Parameter changes

2Adaptability or versatility

If the number of subsequent state number candidates is increased to accommodate states with many branches, then the adaptability improves, but the memory size increases leading to underutilization in states with fewer branches

Engineering Contradiction:
Improveaccommodation of various state transitionsVSAvoidmemory size
Core Design Contradiction:
Adaptability or versatilityVSQuantity of substance

Solution Approach 1:

The patent applies local quality by allowing different parts of the state transition system (different states) to have different data bit widths. Each state number has its own optimized number of subsequent state number candidates stored, so that states with many branches have larger storage while states with fewer branches use smaller storage, eliminating the need for uniform oversized allocation.

Inventive Principle:
Principle #3Local quality

3Loss of energy

If variable data bit widths are used to optimize memory usage, then memory efficiency improves, but the device complexity increases due to additional selection mechanisms

Engineering Contradiction:
Improvememory usage efficiencyVSAvoidselection circuit complexity
Core Design Contradiction:
Loss of energyVSDevice complexity

Solution Approach 1:

The patent applies preliminary action by pre-storing multiple subsequent state number candidates in the memory for each current state number. The selection of the appropriate candidate is then performed by a relatively simple selection circuit based on the event identification code, rather than requiring complex variable bit width encoding/decoding mechanisms.

Inventive Principle:
Principle #10Preliminary action

Data Source

PatentUS8510522B2State transition management device and state transition management method thereof
Publication Date: 2013.08.13 RENESAS ELECTRONICS CORP
  • US8510522B2 patent drawing
  • US8510522B2 patent drawing
  • US8510522B2 patent drawing

AI summary

A state transition management device includes a first terminal receiving a first signal based on a current state-number, a memory which stores a state transition rule and from which a plurality of subsequent state-number candidates are read out in accordance with the first signal, a plurality of first nodes revealing the plurality of subsequent state-number candidates, a second terminal receiving a second signal based on the current state-number, a selection method specifying unit which outputs a selection method specifying signal in accordance with the second signal, a second node revealing the selection method specifying signal, a event terminal receiving a event-signal based on an event, a third terminal receiving a third signal based on the current state-number, a selection circuit which selects a subsequent state-number from the plurality of subsequent number candidates in accordance with the event-signal and the third signal.