Stateful Packet Processing Block with Dynamic Memory Pool

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Solution Overview

Problem

OpenFlow's existing architecture and protocol have limitations in efficiently processing network packets, particularly in handling stateful actions and flexible memory allocation for match and action operations, which affects performance and scalability in network switching.

Innovation Solution

A packet processing block with an input for receiving data in a packet header vector, performing match operations, and executing stateful actions, along with a memory pool for flexible allocation of unit memories to serve as match, action, statistics, meter, and stateful memories, enhancing the OpenFlow switch's capabilities for handling complex packet processing tasks.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If stateful actions are implemented in packet processing, then the functionality and flexibility of OpenFlow switches are improved, but the device complexity increases

Engineering Contradiction:
ImprovefunctionalityVSAvoidcomplexity
Core Design Contradiction:
Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The patent segments the memory system into distinct types (match table, action table, statistics table, meter table, and stateful table) with specialized functions. Each table type handles specific packet processing tasks, allowing the system to implement complex stateful actions while maintaining manageable complexity through functional separation.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent creates a universal memory pool that can be dynamically allocated to serve multiple table types. The same physical memory resources can be configured as match tables, action tables, or stateful tables depending on processing needs, providing multi-functionality that improves adaptability without proportionally increasing device complexity.

Inventive Principle:
Principle #6Universality (Multi-functionality)

2Productivity

If dynamic memory allocation is implemented for match and action operations, then the efficiency of packet processing is improved, but the device complexity increases

Engineering Contradiction:
ImproveefficiencyVSAvoidcomplexity
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The patent implements dynamic memory allocation where the controller can allocate and reallocate memory pools to different table types based on real-time packet processing requirements. This dynamic configuration allows the system to optimize efficiency for different traffic patterns and processing tasks without requiring separate dedicated memory for each function.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The controller acts as an intermediary that manages memory allocation between the memory pool and various table types. It receives allocation requests, determines appropriate memory distribution, and configures the memory pools accordingly, thereby enabling efficient dynamic allocation while centralizing the complexity management in the controller rather than分散 in the switching fabric.

Inventive Principle:
Principle #24Intermediary (Mediator)

3Adaptability or versatility

If a pool of unit memories is allocated for multiple purposes, then the adaptability of the system is improved, but the difficulty of managing memory allocation increases

Engineering Contradiction:
ImproveadaptabilityVSAvoiddifficulty
Core Design Contradiction:
Adaptability or versatilityVSDifficulty of detecting and measuring

Solution Approach 1:

The system implements feedback mechanisms where the controller monitors memory usage across different table types and dynamically adjusts allocations based on actual processing needs. The controller receives information about memory consumption patterns and uses this feedback to optimize the distribution of unit memories among match tables, action tables, statistics tables, meter tables, and stateful tables, thereby managing adaptability without excessive difficulty.

Inventive Principle:
Principle #23Feedback

Data Source

PatentUS10645032B2Packet processing match and action unit with stateful actions
Publication Date: 2020.05.05 TEXAS INSTRUMENTS INC
  • US10645032B2 patent drawing
  • US10645032B2 patent drawing
  • US10645032B2 patent drawing

AI summary

A packet processing block. The block comprises an input for receiving data in a packet header vector, where the vector comprises data values representing information for a packet. The block also comprises circuitry for performing packet match operations in response to at least a portion of the packet header vector and data stored in a match table and circuitry for performing one or more actions in response to a match detected by the circuitry for performing packet match operations. The one or more actions comprise modifying the data values representing information for a packet. The block also comprises at least one stateful memory comprising stateful memory data values. The one or more actions includes various stateful actions for reading stateful memory, modifying data values representing information for a packet, as a function of the stateful memory data values; and storing modified stateful memory data value back into the stateful memory.