Static Code Memory Access Validation Using External Address Translation
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Solution Overview
Problem
In embedded programmable accelerator processing units, especially in deep learning algorithms, validating memory access patterns of static program code is challenging due to the lack of dedicated memory management units, requiring external memory translation mechanisms and complex address mapping, which complicates the testing and verification of memory access patterns.
Innovation Solution
A computer system with a randomizing unit, program code generator, accelerator processing unit, and access recorder unit generates an address translation list based on primary memory access patterns, allowing execution of a static variant of the program instruction stream with address translations, and compares secondary memory access patterns to validate the integrity of the code.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If external memory translation mechanisms are used to map virtual addresses to real system memory addresses, then memory access validation becomes possible, but system complexity increases
Solution Approach 1:
The patent extracts the memory translation function from the accelerator processing unit and implements it externally using a host processor. The host processor captures memory access requests from the accelerator, translates virtual addresses to physical addresses, and manages the address mapping tables. This separation eliminates the need for complex dedicated memory management hardware in the accelerator while maintaining validation capabilities.
Solution Approach 2:
The host processor is utilized to perform multiple functions including executing application code, managing memory translation, and validating memory access patterns. By making the host processor universal and multi-functional, the system avoids adding dedicated translation hardware to the accelerator, thereby reducing device complexity while preserving validation reliability.
2Adaptability or versatility
If static program code templates are used with input variables, then code reusability improves, but verifying memory access patterns becomes more difficult
Solution Approach 1:
The patent performs preliminary validation by capturing and storing the expected memory access patterns (address sequences, access types, data sizes) during a training or reference execution phase. These pre-captured patterns are stored in a database or memory structure for later comparison. When validating static code templates with different input variables, the system compares actual access patterns against the pre-established expected patterns, enabling verification without re-analyzing from scratch.
Solution Approach 2:
The system implements feedback by comparing actual memory access patterns generated during execution with expected patterns captured beforehand. The comparison mechanism provides feedback on whether the static code template adheres to valid memory access patterns for given input variables. This feedback loop enables automated verification of code correctness and security constraints.
Data Source
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AI summary
A computer system configured to perform operations for validating memory access patterns of a static variant of a program instruction stream, the operations including randomizing a first set of input arguments, generating an address translation list for virtual addresses based on memory access patterns and storing memory accesses in a first table, and executing the static variant of the program instruction stream on the accelerator processing unit. During execution, the virtual addresses may be discarded and replaced by the addresses provided in the address translation list. The operations may include recording and storing every memory access of executing the static variant of the program instruction stream in a second table and comparing the memory access patterns stored in the second table to memory accesses patterns stored in the first table. Memory access patterns may be validated or discarded.