Static Dictionary Compression Pipeline for Small Packet Streams

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Solution Overview

Problem

General-purpose processors are inefficient in handling high-capacity network and storage workloads, particularly in processing packet streams due to their poor performance in data compression and stream processing.

Innovation Solution

A highly programmable data processing unit with specialized hardware accelerators, including a data compression pipeline that performs static dictionary-based and dynamic history-based compression, utilizing a search block with hash, match, and path blocks to efficiently compress data streams by replacing repeated patterns with references, followed by entropy coding.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If general-purpose processors are used for data compression, then device complexity is reduced, but processing speed and compression efficiency deteriorate

Engineering Contradiction:
Improvedata compression efficiencyVSAvoidprocessor architecture complexity
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The processor is divided into general-purpose processing cores and specialized hardware accelerators. The hardware accelerators are further segmented into multiple pipelines (first pipeline for dictionary-based compression, second pipeline for history-based compression, third pipeline for entropy coding). This segmentation allows specific compression tasks to be handled by dedicated hardware units, dramatically improving compression efficiency while keeping the overall system manageable through functional separation.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

A compression manager component is introduced as an intermediary between the general-purpose processing cores and the hardware accelerators. The compression manager receives compression requests from software, selects appropriate compression algorithms, and directs tasks to suitable hardware pipelines. This intermediary layer abstracts the complexity of hardware acceleration from both the operating system and the compression algorithms, enabling efficient resource utilization without requiring complex integration at higher software levels.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Speed

If hardware accelerators are added for data compression, then processing speed improves, but device complexity increases

Engineering Contradiction:
Improvepacket stream processing speedVSAvoidhardware architecture complexity
Core Design Contradiction:
SpeedVSDevice complexity

Solution Approach 1:

The hardware accelerators are designed with multi-functional capabilities. Each pipeline can handle different compression algorithms (dictionary-based, history-based, entropy coding) and can process various types of data streams. The pipelines share common resources such as memory interfaces and control logic, allowing a single hardware accelerator to serve multiple compression functions. This universality reduces the need for separate dedicated hardware for each compression task, thereby limiting the increase in device complexity while maintaining high processing speeds.

Inventive Principle:
Principle #6Universality (Multi-functionality)

3Loss of substance

If multiple compression pipelines are implemented, then compression ratio improves, but device complexity increases

Engineering Contradiction:
Improvedata size reductionVSAvoidpipeline architecture complexity
Core Design Contradiction:
Loss of substanceVSDevice complexity

Solution Approach 1:

Multiple compression pipelines are merged into a unified hardware architecture. The first pipeline (dictionary-based compression), second pipeline (history-based compression), and third pipeline (entropy coding) are integrated to share common resources including memory interfaces, control logic, and data buffers. The compression manager coordinates these pipelines to process data through multiple compression stages, achieving high compression ratios by combining different compression techniques. This merging approach allows the system to benefit from multiple compression methods while avoiding the full complexity of completely separate pipeline implementations.

Inventive Principle:
Principle #5Merging (Combining)

Data Source

PatentUS11309908B2Static dictionary-based compression hardware pipeline for data compression accelerator of a data processing unit
Publication Date: 2022.04.19 MICROSOFT TECHNOLOGY LICENSING LLC
  • US11309908B2 patent drawing
  • US11309908B2 patent drawing
  • US11309908B2 patent drawing

AI summary

A highly programmable device, referred to generally as a data processing unit, having multiple processing units for processing streams of information, such as network packets or storage packets, is described. The data processing unit includes one or more specialized hardware accelerators configured to perform acceleration for various data processing functions. This disclosure describes a programmable hardware-based data compression accelerator that includes a pipeline for performing static dictionary-based and dynamic history-based compression on streams of information, such as network packets. The search block may support single and multi-thread processing, and multiple levels of compression effort. To achieve high-compression, the search block may operate at a high level of effort that supports a single thread and use of both a dynamic history of the input data stream and a static dictionary of common words. The static dictionary may be useful in achieving high-compression where the input data stream is relatively small.