Static XOR Circuit Precharge for Fast Low-Voltage Switching
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Solution Overview
Problem
Conventional high-speed XOR designs, particularly in dynamic CMOS, face challenges in reliable operation at low voltages due to increased threshold voltage comparable to supply voltage, leading to slow transitions and inefficiencies in static CMOS XOR circuits.
Innovation Solution
A static complementary transistor type logic gate circuit with precharge devices and swapped input pin orders in pullup and pulldown stacks, allowing for efficient connection to supply voltages through intermediate nodes, eliminating worst-case paths and enabling faster transitions at low voltages.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If conventional static CMOS XOR is used, then the circuit structure is simple, but the transition speed is very slow due to the worst case path from PMOS closest to VDD to lowermost NMOS closest to VSS
Solution Approach 1:
The pullup and pulldown paths are segmented into multiple parallel paths with different transistor combinations. Instead of a single long path from VDD to VSS, the circuit divides the signal path into multiple segments that can operate in parallel, reducing the worst-case transition time by eliminating the need to charge/discharge the entire path sequentially.
Solution Approach 2:
The precharge device precharges intermediate nodes to the far-side supply voltage before the main switching operation. This preliminary action ensures that when the output needs to switch, the intermediate nodes are already prepared, eliminating the need to charge them during the critical transition path, thus speeding up the overall transition.
2Reliability
If pass gate type logic circuits are used, then the transistor count is reduced, but the circuit cannot operate reliably at low voltages due to VT drop between drain and source
Solution Approach 1:
The circuit dynamically selects different pullup and pulldown paths based on the input signal conditions. By using multiple parallel paths with different transistor configurations, the circuit adapts to low voltage conditions by choosing paths that minimize the impact of threshold voltage drops, ensuring reliable operation across varying voltage levels.
Solution Approach 2:
The invention changes the electrical parameters of the circuit by introducing precharge devices that set intermediate nodes to specific voltage levels (far-side supply voltage). This parameter change ensures that intermediate nodes maintain proper voltage levels even when operating at low supply voltages, preventing the VT drop issue that plagues pass gate circuits.
3Speed
If intermediate nodes are not precharged, then the circuit structure is simpler, but the transition speed decreases because intermediate nodes must be charged during the critical path
Solution Approach 1:
The precharge device performs preliminary charging of intermediate nodes to the far-side supply voltage before the main switching operation. This advance preparation ensures that when the output needs to switch states, the intermediate nodes are already at the correct voltage level, eliminating them from the critical charge/discharge path and significantly speeding up transitions.
Solution Approach 2:
The precharge device acts as an intermediary that prepares intermediate nodes in advance. By introducing this intermediate preparation step, the circuit separates the precharging function from the critical switching path, allowing the main transition to occur faster without the burden of charging intermediate nodes during the critical path.
Data Source
AI summary
A static complementary transistor type logic gate circuit includes a plurality of input terminals for receiving a corresponding plurality of input signals, and an output terminal. The logic gate circuit further includes a first plurality of transistors of one conductivity type, arranged to form a plurality of pullup paths for selectively connecting the output terminal, through one or more intermediate nodes, to a positive supply voltage based on the plurality of input signals; and a second plurality of transistors of the complementary conductivity type, arranged to form a plurality of pulldown paths for selectively connecting the output terminal, through one or more intermediate nodes, to a negative supply voltage based on the plurality of input signals. A precharge device is configured to selectively charge an intermediate node to the far-side supply voltage when the intermediate node is disconnected from the near-side supply voltage and disconnected from the output terminal.