Statistical Sampling for Memory Access Time Measurement
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Solution Overview
Problem
Existing methods for accurately measuring embedded memory access time in SoC devices are complex and costly, requiring extensive calibration and being ineffective in characterizing delays within the few hundreds of picoseconds range.
Innovation Solution
A fully digital, statistics-based signal measurement technique that uses a probabilistic approach to measure periodic signals by sampling at random phases, eliminating the need for delay cells and extensive calibration, and allowing for accurate duty cycle measurement with a statistically significant number of sampling events.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If conventional delay cell methods are used to measure memory access time, then measurement capability is provided, but the system requires extensive calibration and becomes complex
Solution Approach 1:
The patent replaces the mechanical/physical delay cell-based measurement system with a fully digital statistical sampling system. Instead of using physical delay cells that require calibration, the invention uses digital counters and statistical analysis of sampled signals to measure memory access time, thereby eliminating the calibration complexity while maintaining measurement precision
Solution Approach 2:
The invention changes the measurement approach from direct time-domain measurement using delay cells to frequency-domain statistical analysis. By sampling the memory output signal at multiple points and analyzing the statistical distribution of sampled values, the system determines memory access time without requiring calibrated delay elements
2Measurement precision
If delay cells are used for measurement, then measurement function is provided, but cost increases due to extensive calibration requirements
Solution Approach 1:
The patent substitutes expensive, calibration-intensive delay cell hardware with a cost-effective digital sampling and counting system. The measurement function is achieved through software-controlled sampling and statistical analysis rather than through calibrated physical components, reducing manufacturing costs while maintaining precision
Solution Approach 2:
The invention uses inexpensive digital logic elements (counters, samplers, and logic gates) instead of expensive calibrated delay cells. The system employs readily available standard cell library components that can be easily manufactured without specialized calibration processes, making the solution more cost-effective
3Device complexity
If statistical sampling is used to measure periodic signals, then calibration is eliminated, but multiple sampling events are required
Solution Approach 1:
The patent implements continuous sampling of the memory output signal throughout the measurement period. Instead of taking isolated samples, the system continuously monitors and records the state of the memory output at each sampling point, accumulating statistical data that enables accurate determination of memory access time through analysis of the sampled distribution
Solution Approach 2:
The invention uses periodic sampling at a fixed sampling rate to capture the memory output signal. By systematically sampling at regular intervals and analyzing the periodic pattern of sampled values, the system can determine memory access time through statistical analysis of when transitions occur in the sampled sequence
Data Source
AI summary
A fully-digital probabilistic measurement methodology in which a periodic signal generated on an IC device is sampled multiple times during a test period, with the asserted/de-asserted state of the periodic signal determined during each sampling event. A statistically significant number of sampling events are executed according to a reference signal frequency that is uncorrelated to the IC's system clock, whereby each successive sampling event involves detecting an essentially random associated phase of the periodic signal such that the probability of detecting an asserted state during any given sampling event is proportional to the duty cycle of the periodic signal. A first count value records the number of sampling events in which the periodic signal is asserted, and a second count value records the total number of sampling events performed, whereby a ratio of these two count values provides a statistical measurement of the periodic signal's duty cycle.