Statistical Static Timing Analysis With Multi-Corner Projection
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Solution Overview
Problem
Existing methods for statistical static timing analysis (SSTA) face challenges in efficiently addressing process and voltage variations across a range of conditions, leading to non-linear voltage/process tradeoffs and difficulties in maintaining constant frequency across integrated circuits.
Innovation Solution
A method employing statistical static timing analysis with multi-corner projection, performing a number of finite difference operations between voltage/process pairs to identify optimal pairings that maintain a fixed frequency, allowing for voltage to be traded for process variations, thereby maintaining constant frequency across all chips.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If traditional statistical static timing analysis is used to address process and voltage variations, then timing analysis can be performed, but multiple timing runs and trial-and-error iterations are required leading to non-linear voltage/process tradeoffs
Solution Approach 1:
The patent performs a single statistical static timing analysis that proactively identifies optimal voltage/process pairings before final design closure. By using finite difference operations to calculate sensitivities of timing parameters to voltage and process variations, the method determines optimal pairings in advance, eliminating the need for multiple iterative timing runs and trial-and-error adjustments.
Solution Approach 2:
The patent changes the approach from performing multiple timing analyses with different voltage/process corners to performing a single timing analysis with finite difference operations. This involves calculating sensitivities of timing parameters to voltage and process variations and using these sensitivities to identify optimal voltage/process pairings that maintain constant frequency, thereby reducing computational iterations.
2Reliability
If multiple timing runs are performed to address voltage/process variations, then optimal pairings can be identified, but the process becomes complex and requires trial-and-error iterations
Solution Approach 1:
The patent merges multiple timing analysis runs into a single statistical static timing analysis by incorporating finite difference operations. Instead of performing separate timing analyses for different voltage and process corners, the method combines them into one analysis that calculates sensitivities and identifies optimal voltage/process pairings simultaneously, reducing complexity while maintaining reliability.
Solution Approach 2:
The patent introduces finite difference operations as an intermediary mechanism between traditional timing analysis and optimal pairing identification. These operations calculate the sensitivities of timing parameters to voltage and process variations, serving as a mediator that enables the determination of optimal voltage/process pairings without requiring multiple separate timing runs or trial-and-error iterations.
3Adaptability or versatility
If traditional timing analysis methods are used, then deterministic accuracy can be maintained, but the ability to efficiently trade voltage for process variations is limited
Solution Approach 1:
The patent introduces dynamic adaptability by enabling the trading of voltage for process variations based on calculated sensitivities. Instead of fixed voltage/process corners, the method dynamically identifies optimal pairings that maintain constant frequency across different process conditions, allowing flexible adaptation to various design requirements and improving design closure efficiency.
Solution Approach 2:
The patent replaces the traditional mechanical approach of performing multiple discrete timing runs with a computational substitution using finite difference operations. This substitution calculates sensitivities and identifies optimal voltage/process pairings through mathematical operations, replacing the iterative mechanical process with a more efficient computational method that maintains deterministic accuracy.
Data Source
AI summary
In an approach for addressing process and voltage points across voltage and process space, a computer identifies an integrated circuit design. The computer identifies a timing model associated with the identified integrated circuit design. The computer identifies a minimum set of voltage/process pairs associated with the integrated circuit design. The computer identifies a number n that defines the number of finite differencing operations to be performed for the identified minimum set of voltage/process pairs. The computer performs a single statistical static timing analysis with multi-corner projection for the identified integrated circuit based on the received number n that provides a finite difference for each number of finite differencing operations to be performed based on n for the identified minimum set of voltage/process pairs. The computer performs addressing based on the performed statistical static timing analysis. The computer provides a report.