Shallow Trench Isolation Sigma Cavity for Transistor Stress Control
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
As transistors are scaled to smaller dimensions, there is a need for higher carrier mobility to improve switching speeds, and existing stress/strain engineering techniques face challenges in inducing and controlling stressors effectively for optimal carrier mobility in semiconductor devices.
Innovation Solution
The development of a shallow trench isolation structure with a sigma cavity upper region and a substantially rectangular lower region, filled with materials that provide good gap fill and stress-inducing properties, allowing for precise tuning of channel stress by eliminating or complementing stress from source/drain stressor regions.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If transistors are scaled to smaller dimensions, then device integration density is improved, but carrier mobility deteriorates
Solution Approach 1:
The patent applies local quality by creating a sigma-shaped cavity profile in the shallow trench isolation structure, where the cavity width varies along the depth to provide localized stress distribution. The cavity is narrower at the top and wider at the bottom, allowing different stress levels to be applied to different regions of the transistor channel, thereby improving carrier mobility in scaled devices without compromising integration density.
2Speed
If stress/strain engineering is applied to improve carrier mobility, then device performance is improved, but control of stressors becomes more difficult
Solution Approach 1:
The patent segments the stressor control into two distinct components: the sigma cavity shape in the shallow trench isolation structure and separate source/drain stressor regions. This segmentation allows independent optimization and control of stress in different areas, enabling precise tuning of channel stress to achieve desired carrier mobility while maintaining manufacturing control.
Solution Approach 2:
The patent utilizes parameter changes by varying the cavity width as a function of depth to create the sigma shape, and by selecting different fill materials with specific stress properties. This allows continuous tuning of the stress magnitude and distribution in the channel, providing precise control over carrier mobility while maintaining compatibility with standard fabrication processes.
3Speed
If source/drain stressor regions are used to induce stress, then carrier mobility is improved, but device complexity increases
Solution Approach 1:
The patent applies universality by designing the shallow trench isolation structure to serve multiple functions: electrical isolation between devices and stress induction in the channel. The sigma cavity profile simultaneously provides both isolation and stress control, eliminating the need for separate source/drain stressor regions and thereby reducing device complexity while maintaining carrier mobility improvement.
Data Source
AI summary
Embodiments of the present invention provide an improved shallow trench isolation structure and method of fabrication. The shallow trench isolation cavity includes an upper region having a sigma cavity shape, and a lower region having a substantially rectangular cross-section. The lower region is filled with a first material having good gap fill properties. The sigma cavity is filled with a second material having good stress-inducing properties. In some embodiments, source/drain stressor cavities may be eliminated, with the stress provided by the shallow trench isolation structure. In other embodiments, the stress from the shallow trench isolation structure may be used to complement or counteract stress from a source/drain stressor region of an adjacent transistor. This enables precise tuning of channel stress to achieve a desired carrier mobility for a transistor.