Stealth-Persist Architecture for Persistent Application Memory
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Solution Overview
Problem
Emerging non-volatile memories (NVMs) offer persistence and high capacity but suffer from high read/write latencies, making them unsuitable for applications requiring both persistence and high performance.
Innovation Solution
The Stealth-Persist architecture mirrors dynamic random access writes to a non-volatile memory concurrently through a memory controller hub, ensuring coherent durability of writes while optimizing read operations by serving them directly from the dynamic random access memory.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If non-volatile memory is used for persistent storage, then data persistence and crash consistency are achieved, but read/write latency increases significantly
Solution Approach 1:
The patent creates a mirror copy of NVM data in DRAM through the mirror region. When data is written to NVM, the memory controller hub concurrently writes the same data to the mirror region in DRAM. This copying mechanism allows reads to be served from the fast DRAM mirror while writes maintain persistence through NVM, resolving the latency-persistence contradiction.
Solution Approach 2:
The mirror region in DRAM acts as an intermediary between the application and the persistent NVM. Applications interact with the mirror region for fast access, while the memory controller hub mediates by concurrently mirroring writes to NVM in the background, hiding the slow NVM latency from the application path.
2Speed
If DRAM is used as main memory, then access speed is improved, but data persistence capability is lost
Solution Approach 1:
The system maintains a copy of persistent data in the DRAM mirror region, enabling fast access while preserving persistence through the concurrent write to NVM. The mirror region effectively creates a persistent DRAM, combining the speed of DRAM with the persistence of NVM.
Solution Approach 2:
The system performs preliminary writing to both DRAM mirror region and NVM concurrently during write operations. This preliminary action ensures that data is already in the fast DRAM mirror for subsequent reads, while simultaneously establishing persistence in NVM before the operation completes.
3Quantity of substance
If NVM is used for persistent storage, then capacity and power efficiency are improved, but access performance deteriorates
Solution Approach 1:
The mirror region in DRAM stores copies of frequently accessed NVM data, creating a fast cache layer. This copying strategy allows the system to maintain large NVM capacity while providing fast access to hot data through the DRAM mirror, improving productivity without sacrificing capacity.
Solution Approach 2:
The system applies different quality characteristics to different parts of the memory system: the mirror region in DRAM provides fast access for active data, while the NVM provides high-capacity persistent storage for cold data. This local differentiation optimizes both capacity and access performance for their respective data types.
Data Source
AI summary
Illustrative embodiments are directed to methods, apparatus and computer program products for caching at least a fraction of data stored in a non-volatile memory in a mirror region of a dynamic random access memory. A memory controller hub of a processor chip coupled to both the non-volatile memory and the dynamic random access memory is configured to, when an update to the dynamic random access memory is cached in the mirror region of the dynamic random access memory, use the memory controller hub to write the update directly to the mirror region of the dynamic random access memory and concurrently mirror the update to the non-volatile memory to provide coherent persistent durability of the update. When a read from the dynamic random access memory is cached in the mirror region of the dynamic random access memory, embodiments can use the memory controller hub to serve the read directly from the mirror region of the dynamic random access memory to optimize read operations of persistent objects.