Steiner Tree Routing With Deep RL for Diverse VLSI Topologies
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Solution Overview
Problem
Traditional algorithms for constructing Steiner minimum trees (SMTs) in VLSI design struggle with NP-hard complexity, focusing on single optimal solutions rather than diversified topologies that balance multiple constraints, and fail to efficiently handle rectilinear (RSMT) and octilinear (OSMT) routing modes, which are crucial for optimizing wirelength, congestion, and interconnect delays.
Innovation Solution
A unified deep reinforcement learning approach is employed to construct RSMTs and OSMTs, utilizing an edge point sequence (EPS) design, a deep learning model trained with negative wirelength as a reward, and stochastic machine learning to generate diversified routing topologies, incorporating a fast and accurate wirelength computation algorithm.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Device complexity
If traditional algorithms are used to construct Steiner minimum trees, then computational complexity is reduced, but the ability to generate diversified routing topologies is limited
Solution Approach 1:
The patent replaces traditional deterministic algorithms with a deep reinforcement learning model. The DRL agent learns optimal routing strategies through training, substituting conventional mechanical search methods with intelligent decision-making based on learned policies. This enables the system to generate diverse routing topologies without exhaustive search, resolving the contradiction between computational complexity and topology diversity.
Solution Approach 2:
The patent introduces dynamic routing angle selection (45°, 135°, 180°) based on real-time state assessment by the DRL model. Instead of fixed routing rules, the system dynamically adapts routing decisions to generate diversified topologies. This dynamic approach allows the system to explore multiple routing possibilities efficiently, achieving topology diversity without proportional increase in computational complexity.
2Productivity
If octilinear routing mode is used to reduce wirelength and via count, then routing performance is improved, but problem complexity increases
Solution Approach 1:
The patent changes the routing angle parameter from fixed rectilinear (0°, 90°) to octilinear (45°, 135°, 180°) with dynamic selection. The DRL model learns optimal angle selection based on net characteristics and routing state. This parameter change enables better routing performance (reduced wirelength and via count) while the learned policy manages the increased complexity by making intelligent angle selection rather than exhaustive exploration.
Solution Approach 2:
The patent introduces pseudo-Steiner points as intermediary elements to facilitate octilinear routing. These intermediate points enable 45° and 135° routing angles by serving as connection points between pins. The DRL model learns when and where to introduce these intermediaries, managing the complexity of octilinear routing while achieving performance improvements in wirelength and via reduction.
3Productivity
If single optimal SMT is constructed for a given net, then optimization efficiency is improved, but ability to balance multiple constraints is reduced
Solution Approach 1:
The patent makes the DRL model universal by training it to handle multiple constraints simultaneously (wirelength, timing, congestion, coupling capacitance). The single model learns to balance all these constraints through multi-objective reinforcement learning, eliminating the need for separate specialized algorithms for each constraint. This achieves both efficiency (single model) and versatility (multiple constraints balanced).
Solution Approach 2:
The patent implements feedback mechanisms where the DRL model receives rewards based on multiple constraint violations and learns to balance them. The reward function incorporates wirelength, timing, congestion, and coupling capacitance metrics, providing continuous feedback to the agent. This feedback loop enables the model to learn optimal strategies for balancing multiple constraints while maintaining optimization efficiency.
Data Source
AI summary
Disclosed is a unified deep reinforcement learning approach for constructing rectilinear and octilinear Steiner minimum trees in the technical field of computer-aided design of integrated circuits, the method including designing an edge point sequence (EPS) based on structural characteristics of a Steiner minimum tree (SMT) to bridge a gap between deep learning model output and an SMT structure; designing a deep learning model for the EPS, and using a negative wirelength of the SMT as a reward to train the deep learning model through the deep reinforcement learning (DRL); providing a corresponding fast and accurate wirelength computation algorithm for a quality assessment of construction solutions to accelerate training of the deep learning model; and constructing diversified construction solutions of SMTs utilizing the stochastic nature of machine learning. The method of the present invention can solve rectilinear Steiner minimum tree (RSMT) and octilinear Steiner minimum tree (OSMT) problems and generate diversified routing topologies.