Stencil Amplification for High-Order Computation Optimization
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Existing stencil computations face challenges in optimizing high-order stencils due to difficulties in generating optimized code that maximizes performance and memory efficiency, particularly in accessing a large number of data elements efficiently.
Innovation Solution
The method of stencil amplification, which increases the stencil order or size by representing each stencil point with functions or data from previous computations, allowing for the replacement of stencil points with substencils, thereby modifying the computation to access additional data elements without altering the underlying problem's semantics.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If stencil order is increased to access more data elements, then computation accuracy is improved, but memory access overhead increases
Solution Approach 1:
The patent applies preliminary action by computing and storing intermediate stencil results in advance. The system computes substencils from previous sequence steps and stores them in registers or memory, so that when higher-order stencil points are needed, the pre-computed values are already available. This eliminates the need to re-access original data elements, reducing memory access overhead while maintaining computation accuracy.
Solution Approach 2:
The patent implements nesting by organizing stencil computations hierarchically. Lower-order substencils are computed first and nested within higher-order stencil points. Each stencil point is represented as a function of previous computations, creating a nested structure where intermediate results are reused. This nesting pattern reduces redundant memory accesses by computing smaller stencils multiple times and combining them to form larger stencil computations.
2Measurement precision
If stencil size is increased to improve computation accuracy, then result precision is improved, but memory hierarchy traffic increases
Solution Approach 1:
The patent applies discarding and recovering by temporarily storing intermediate stencil computations in registers or cache memory during the computation sequence. These intermediate results are discarded from the original data structure but recovered from the temporary storage when needed for higher-order stencil points. This approach reduces memory hierarchy traffic by avoiding repeated accesses to main memory while preserving the precision required for accurate computations.
3Measurement precision
If more data elements are accessed in high-order stencils, then computation accuracy is improved, but code generation complexity increases
Solution Approach 1:
The patent applies segmentation by dividing high-order stencil computations into smaller, manageable substencils. Each stencil point is segmented into multiple lower-order computations that can be generated and optimized independently. This segmentation reduces code generation complexity by breaking down the complex task of generating high-order stencil code into simpler sub-tasks, while still achieving the required computation accuracy through combination of the segmented results.
Data Source
AI summary
In a sequence of major computational steps or in an iterative computation, a stencil amplifier can increase the number of data elements accessed from one or more data structures in a single major step or iteration, thereby decreasing the total number of computations and/or communication operations in the overall sequence or the iterative computation. Stencil amplification, which can be optimized according to a specified parameter such as compile time, rune time, code size, etc., can improve the performance of a computing system executing the sequence or the iterative computation in terms of run time, memory load, energy consumption, etc. The stencil amplifier typically determines boundaries, to avoid erroneously accessing data elements not present in the one or more data structures.


