Digital Step Attenuator Circuit for Glitch-Free RF Switching
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Solution Overview
Problem
Digital Step Attenuators (DSAs) experience signal glitches during transitions between attenuation stages, leading to undesirable signal level variations that can damage components, cause feedback loops to malfunction, or result in signal distortion, due to the large variation in RF signal level, especially when switching between different attenuation stages.
Innovation Solution
A method and circuit design for a digital step attenuator that utilizes three independent branches with transistors and resistors, allowing for independent operation of each transistor to minimize impedance mismatch and achieve monotonic signal attenuation without glitches, by configuring the attenuator circuit with a PI configuration and using thermometer-coded steps to reduce the number of hardware components required.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If conventional DSA switching is used to change attenuation stages, then the attenuation level can be changed, but signal glitches and large signal level variations occur during transitions
Solution Approach 1:
The patent applies preliminary action by pre-establishing a direct current path through the attenuator circuit before switching attenuation stages. The circuit maintains a continuous DC bias current flow through the transistor network, so that when attenuation stages are switched, the signal path is already prepared and no glitches occur. This is achieved by configuring transistors in a specific arrangement where the DC path remains active regardless of the attenuation state.
Solution Approach 2:
The patent segments the attenuator circuit into multiple independent branches, each controlled by separate transistors. Instead of using a single switching mechanism, the circuit divides the attenuation function across multiple parallel paths (first branch with first transistor, second branch with second transistor, third branch with third transistor). This segmentation allows individual stage switching without affecting the overall signal continuity, eliminating glitches while maintaining attenuation functionality.
2Reliability
If multiple transistors are used in parallel branches to eliminate glitches, then signal stability improves, but the number of hardware components increases
Solution Approach 1:
The patent applies universality by designing each transistor branch to serve multiple functions simultaneously. Each transistor not only controls attenuation but also maintains the DC bias current path and provides signal routing capability. The parallel branches are configured so that active transistors contribute to both attenuation control and signal continuity, making each component multi-functional and reducing the need for additional dedicated components.
Solution Approach 2:
The patent merges the DC biasing function with the attenuation switching function into a unified circuit architecture. Instead of having separate DC paths and signal paths, the circuit combines them so that the same transistor network performs both functions. This merging reduces component count by eliminating redundant elements while maintaining signal stability during transitions.
Data Source
AI summary
A digital step attenuator (DSA) cell and related method are provided. The DSA cell includes a first branch comprising a first resistor connected, at a first side, to an input port and, at a second side, to an output port; a second resistor connected, at a first side, to the first resistor and, at a second side, to a first transistor and a third resistor connected, at a first side, to the first resistor and, at a second side, to a second transistor. Also included in the DSA cell is a second branch, in a parallel configuration with the first resistor, that includes a fourth resistor and a third transistor. Also included is a third branch, in a parallel configuration with the first resistor, that includes a fourth transistor. The first transistor, the second transistor, the third transistor, and the fourth transistor are configured to be operated independently.