Step-Forming Material Planarization for Photoresist Uniformity

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Solution Overview

Problem

The challenge in semiconductor integrated circuit (IC) manufacturing is maintaining uniformity of photoresist thickness across substrates with varying topography, which affects critical dimension control during lithography patterning.

Innovation Solution

A method involving the deposition of a step-forming material (SFM) with a negative photoresist configuration is used to create a patterned SFM, which is then removed from high-topography areas, resulting in a substantially planar surface, allowing for improved uniformity of the photoresist thickness and subsequent lithography patterning.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Manufacturing precision

If lithography patterning is performed on substrates with substantial topography variation, then manufacturing process can be completed, but photoresist thickness uniformity deteriorates

Engineering Contradiction:
Improvephotoresist thickness uniformityVSAvoidsubstrate topography variation
Core Design Contradiction:
Manufacturing precisionVSDevice complexity

Solution Approach 1:

A step-forming material layer is deposited beforehand on the substrate to create a planarized surface before applying the photoresist layer. This preliminary planarization action ensures that the photoresist can be uniformly deposited regardless of the underlying substrate topography, directly resolving the contradiction between maintaining photoresist thickness uniformity and dealing with substrate topography variation.

Inventive Principle:
Principle #10Preliminary action

2Manufacturing precision

If photoresist thickness uniformity is improved on high-topography substrates, then critical dimension control is enhanced, but manufacturing process complexity increases

Engineering Contradiction:
Improvecritical dimension controlVSAvoidmanufacturing process complexity
Core Design Contradiction:
Manufacturing precisionVSDevice complexity

Solution Approach 1:

A step-forming material layer is introduced as an intermediary between the substrate and the photoresist layer. This intermediate layer absorbs the topography variations from the substrate, providing a uniform surface for photoresist deposition and enabling improved critical dimension control without excessively complicating the overall manufacturing process.

Inventive Principle:
Principle #24Intermediary (Mediator)

3Manufacturing precision

If substrate topography is reduced, then photoresist deposition uniformity is improved, but additional process steps are required

Engineering Contradiction:
Improvephotoresist deposition uniformityVSAvoidprocess steps
Core Design Contradiction:
Manufacturing precisionVSDevice complexity

Solution Approach 1:

The step-forming material is deposited in advance to pre-planarize the substrate surface before photoresist application. This preliminary action creates a uniform deposition surface, improving photoresist uniformity while requiring only one additional deposition step rather than multiple complex topography reduction processes.

Inventive Principle:
Principle #10Preliminary action

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach minimizes elevational disparities and enhances photoresist thickness uniformity across the substrate, improving critical dimension uniformity and simplifying the patterning process, thereby reducing manufacturing complexity.

Implementation Method 1

depositing a step-forming material (SFM) with a negative photoresist

Methodology Applied
Scientific EffectPhysical Vapour Deposition: Physical Vapour Deposition

Implementation Method 2

forming a patterned photosensitive SFM in the first area

Methodology Applied
Scientific EffectPhotolithography: Photography

Data Source

PatentUS8883403B2Method of semiconductor integrated circuit fabrication
Publication Date: 2014.11.11 TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD
  • US8883403B2 patent drawing
  • US8883403B2 patent drawing
  • US8883403B2 patent drawing

AI summary

A method of fabricating a semiconductor integrated circuit (IC) is disclosed. The method includes providing a substrate having two different topography areas adjacent to each other. A step-forming material (SFM) is deposited over the substrate. A patterned SFM is formed in the low topography area of the two areas. The formation of the patterned SFM provides a fairly planar surface across over the substrate.