Stepped Active Contact Layout to Prevent Gate Contact Shorts

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Solution Overview

Problem

As the integration density of semiconductor devices increases, there is a risk of unintended connection between gate contacts and active contacts, which can compromise the reliability and performance of the device.

Innovation Solution

The design includes an upper contact pattern that is formed at a position far from the gate contact, with a specific structure and orientation that prevents accidental connection with the gate contact, thereby maintaining contact integrity and enhancing device reliability.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If integration density of semiconductor devices is increased, then device functionality and performance are improved, but the risk of unintended connection between gate contacts and active contacts increases

Engineering Contradiction:
Improveintegration densityVSAvoidcontact connection reliability
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

The active contact is designed with a stepped structure consisting of a lower contact pattern and an upper contact pattern at different vertical levels. The upper contact pattern is positioned at a higher elevation than the gate contact, creating a vertical separation that prevents horizontal unintended connections while maintaining electrical connectivity through the stepped configuration.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Solution Approach 2:

The active contact is divided into two distinct segments: a lower contact pattern that makes electrical connection with the source/drain pattern, and an upper contact pattern that is elevated and horizontally offset from the gate contact. This segmentation allows each part to fulfill its function while preventing unintended connections between different contact types.

Inventive Principle:
Principle #1Segmentation

2Area of stationary object

If gate contact and active contact are positioned closer together, then device area is reduced, but unintended connection risk increases

Engineering Contradiction:
Improvedevice areaVSAvoidcontact isolation
Core Design Contradiction:
Area of stationary objectVSReliability

Solution Approach 1:

Instead of increasing horizontal separation between gate contact and active contact, the invention utilizes the vertical dimension by elevating the upper contact pattern of the active contact. This allows the contacts to be positioned closer in the horizontal plane while maintaining reliable isolation through vertical separation.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Data Source

PatentUS12009398B2Semiconductor devices and methods of fabricating the same
Publication Date: 2024.06.11 SAMSUNG ELECTRONICS CO LTD
  • US12009398B2 patent drawing
  • US12009398B2 patent drawing
  • US12009398B2 patent drawing

AI summary

A semiconductor device is disclosed. The semiconductor device includes a gate electrode on a substrate and extending in a first direction, source/drain patterns spaced apart from each other, in a second direction, with the gate electrode interposed therebetween, a gate contact electrically connected to the gate electrode, and an active contact electrically connected to at least one of the source/drain patterns. The active contact includes a lower contact pattern electrically connected to the at least one of the source/drain patterns, the lower contact pattern having a first width in the first direction, and an upper contact pattern electrically connected to a top surface of the lower contact pattern, the upper contact pattern having a second width in the first direction that is smaller than the first width. The upper contact pattern and the gate contact horizontally overlap each other.