Stepped Conductive Bump Structure for Low-Resistance Interconnects
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Solution Overview
Problem
The existing interconnect structures in modern integrated circuits face limitations in performance and density due to poor adhesion between non-metallic passivation layers and conductive bumps, leading to gaps and increased contact resistance, which affects the reliability of electrical connections.
Innovation Solution
A method involving the formation of conductive bumps with stepped sidewall profiles and conductive caps, where a sacrificial layer is patterned to create recesses for the bumps, enhancing adhesion and reducing diffusion paths, thereby improving contact resistance and reliability.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Stability of the object's composition
If non-metallic passivation layers are used to isolate devices, then device isolation is achieved, but adhesion to conductive bumps deteriorates leading to gaps and increased contact resistance
Solution Approach 1:
The passivation layer structure is segmented into multiple layers with different materials and functions. The first passivation layer provides device isolation, while the second passivation layer provides a bonding interface for conductive bumps, allowing each layer to optimize its specific function without compromising the other
Solution Approach 2:
The patent uses composite passivation structures combining different materials (e.g., silicon oxide, silicon nitride, silicon oxynitride) to achieve both electrical isolation and mechanical adhesion properties. The composite structure leverages the insulating properties of one material and the adhesive properties of another
2Ease of manufacture
If conventional flat bump structures are used, then manufacturing simplicity is maintained, but contact resistance increases due to poor adhesion
Solution Approach 1:
The conductive bumps are formed with curved or domed top surfaces instead of flat surfaces. This curvature increases the contact area with the passivation layer and improves mechanical interlocking, thereby reducing contact resistance while maintaining compatibility with standard bump formation processes
3Device complexity
If sacrificial layers are removed completely, then bump formation is simplified, but foreign material contamination increases
Solution Approach 1:
The sacrificial layer is selectively removed only from specific regions where bump formation is required, rather than complete removal. This extraction approach maintains the sacrificial layer in areas where it provides protective functions, preventing foreign material contamination while enabling bump formation in targeted locations
Data Source
AI summary
A semiconductor device includes a semiconductor substrate, a conductive pad over the semiconductor substrate, a conductive bump, a conductive cap over the conductive bump, and a passivation layer. The conductive pad is over the semiconductor substrate. The conductive bump is over the conductive pad, wherein the conductive bump has a stepped sidewall structure including a lower sidewall, an upper sidewall laterally offset from the lower sidewall, and an intermediary surface laterally extending from a bottom edge of the upper sidewall to a top edge of the lower sidewall. The conductive cap is over the conductive bump. The passivation layer is over the semiconductor substrate and laterally surrounds the conductive bump, wherein the passivation layer has a top surface higher than the intermediary surface of the stepped sidewall structure of the conductive bump and lower than a top surface of conductive cap.