Stepped-Back Chip Package Cavity Layout for Smaller Footprints

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Solution Overview

Problem

There is an ongoing need for packages with substrates and integrated devices that offer improved performance while being compact, small, and thin, and also require a reduction in overall package size.

Innovation Solution

The package comprises a first substrate with an integrated device having a step back side, a second substrate with a cavity that partially houses the integrated device, and an encapsulation layer between the substrates, which is also partially located in the cavity of the second substrate.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Volume of stationary object

If the integrated device is placed entirely on the first substrate without a cavity, then the package structure is simpler, but the package size cannot be reduced and thermal performance is limited

Engineering Contradiction:
Improvepackage sizeVSAvoidpackage structure
Core Design Contradiction:
Volume of stationary objectVSDevice complexity

Solution Approach 1:

The integrated device is partially nested within the cavity of the second substrate, with the step back side allowing the device to extend into the cavity space. This nesting arrangement reduces the overall package volume by utilizing the cavity space that would otherwise be empty, while maintaining a manageable structural complexity through the organized multi-substrate configuration.

Inventive Principle:
Principle #7Nested doll (Nesting)

Solution Approach 2:

The step back side of the integrated device introduces a dimensional change by creating a stepped profile that allows the device to occupy both the surface plane and the cavity depth. This dimensional transition enables more efficient space utilization in the vertical dimension, reducing the horizontal footprint and overall package size without requiring complex lateral arrangements.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

2Adaptability or versatility

If the cavity in the second substrate is made larger to accommodate the integrated device, then the device can be better integrated, but the package size increases and fewer interconnects can be placed

Engineering Contradiction:
Improvedevice integrationVSAvoidpackage size
Core Design Contradiction:
Adaptability or versatilityVSVolume of stationary object

Solution Approach 1:

The cavity is designed with non-uniform dimensions, being larger in specific regions to accommodate the integrated device's step back side while maintaining smaller dimensions in other areas. This localized sizing allows the cavity to provide necessary accommodation for the device without unnecessarily increasing the overall package volume, and leaves sufficient space in the substrate for placing additional interconnects.

Inventive Principle:
Principle #3Local quality

3Temperature

If the cavity size is increased to improve thermal performance, then heat dissipation may be improved, but the package size increases

Engineering Contradiction:
Improvethermal performanceVSAvoidpackage size
Core Design Contradiction:
TemperatureVSVolume of stationary object

Solution Approach 1:

The integrated device is nested within the cavity, allowing the cavity to serve as a thermal management structure. The cavity provides pathways for thermal conduction and convection while maintaining a compact footprint, as the device itself occupies the cavity space rather than requiring additional external volume for thermal management features.

Inventive Principle:
Principle #7Nested doll (Nesting)

Data Source

PatentUS20250191989A1Package comprising a substrate with cavity and an integrated device with a step back side
Publication Date: 2025.06.12 QUALCOMM INC
  • US20250191989A1 patent drawing
  • US20250191989A1 patent drawing
  • US20250191989A1 patent drawing

AI summary

A package comprising a first substrate; an integrated device coupled to the first substrate, wherein the integrated device comprises a step back side; a second substrate comprising a cavity, wherein the integrated device is located at least partially in the cavity of the second substrate; and an encapsulation layer coupled to the first substrate and the second substrate. The encapsulation layer is located between the first substrate and the second substrate. The encapsulation layer is located at least partially in the cavity of the second substrate.