Stepped Conductive Layers for Uniform Contact Resistance
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Solution Overview
Problem
Conventional semiconductor memory devices face challenges in manufacturing nonvolatile memory devices with high reliability due to difficulties in forming contact plugs with uniform resistance and accurate hole penetration, especially as the depth of the contact plug increases, leading to issues with filling holes and forming stepped conductive layers.
Innovation Solution
The proposed nonvolatile semiconductor memory device features a memory string with a columnar semiconductor layer and charge storage layer, along with stepped first conductive layers and second conductive layers that extend upwardly from the stepped portions, where the upper ends are aligned parallel to the substrate and the diameter decreases from the upper end to the lower end, ensuring a uniform contact area and easier hole formation.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If contact plugs are formed by penetrating interlayer insulating layer to reach stacked conductive layers, then electrical connection is achieved, but the contact plug becomes tapered making it difficult to fill holes and form uniform contact area
Solution Approach 1:
The contact plug is divided into multiple segments corresponding to different stacked conductive layers. Each segment has an optimized diameter independent of others, allowing uniform contact area at each layer while maintaining electrical connection. This segmentation resolves the tapering problem by treating each contact interface as a separate formation process.
Solution Approach 2:
Different portions of the contact plug structure are given different diameters tailored to local requirements. The contact area at each stacked conductive layer is locally optimized to ensure uniform contact, while the overall structure maintains connectivity. This local quality approach allows each interface to have ideal contact properties without compromising the entire contact plug.
2Reliability
If holes are formed to penetrate deep interlayer insulating layer, then contact with lower stacked conductive layers is achieved, but hole formation becomes increasingly difficult and contact area decreases
Solution Approach 1:
The deep penetration hole formation process is segmented into multiple shallower hole formation steps, each targeting a specific stacked conductive layer. This eliminates the difficulty of forming one extremely deep hole by breaking it into manageable segments, where each hole has optimized depth and diameter for its specific target layer.
Solution Approach 2:
Instead of forming one deep vertical hole, the approach uses multiple holes at different horizontal positions and depths, creating a three-dimensional contact structure. This dimensional transformation allows each hole to be formed with optimal parameters for its specific depth, avoiding the exponential difficulty increase associated with single deep hole formation.
3Ease of manufacture
If contact plug diameter decreases from upper end to lower end, then hole formation is facilitated, but contact area with stacked conductive layer becomes smaller
Solution Approach 1:
The contact plug structure is segmented into multiple contact interfaces, each with its own optimized contact area. Rather than using a single tapered diameter, each segment maintains an appropriate contact area for its specific stacked conductive layer, ensuring sufficient electrical connection while facilitating hole formation through controlled geometry.
Solution Approach 2:
Each contact interface has locally optimized diameter and contact area tailored to the specific requirements of the target stacked conductive layer. This local quality ensures that contact area is sufficient where needed while the overall geometry facilitates manufacturing, resolving the conflict between contact area and hole formation ease.
Data Source
AI summary
A nonvolatile semiconductor memory device comprises a memory string, and a wiring. The memory string comprises a semiconductor layer, a charge storage layer, and a plurality of first conductive layers. The plurality of first conductive layers comprises a stepped portion formed in a stepped shape such that positions of ends of the plurality of first conductive layers differ from one another. The wiring comprises a plurality of second conductive layers extending upwardly from an upper surface of the first conductive layers comprising the stepped portion. The plurality of second conductive layers are formed such that upper ends thereof are aligned with a surface parallel to the substrate, and such that a diameter thereof decreases from the upper end thereof to a lower end thereof. The plurality of second conductive layers are formed such that the greater a length thereof in the perpendicular direction, the larger a diameter of the upper end thereof.