Stepped Grooves for 3D Memory Contact Integration
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Solution Overview
Problem
Current semiconductor devices with multi-layered structures face challenges in efficiently connecting contact plugs to conductive patterns at different heights, which hinders independent electrical signal application and affects the integration and performance of three-dimensional memory devices.
Innovation Solution
A semiconductor device and manufacturing method involving a substrate with alternating interlayer insulating layers and conductive patterns, featuring stepped grooves with symmetric sidewalls to create areas for contact plug connection, allowing for effective electrical signal application and improved integration of memory strings.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If contact plugs are connected to conductive patterns at different heights in a multi-layered structure, then independent electrical signal application is enabled, but the aspect ratio of stepped grooves increases making manufacturing difficult
Solution Approach 1:
The patent introduces a lateral offset between adjacent stepped grooves, creating a staggered arrangement where grooves are positioned at different horizontal locations rather than directly above each other. This dimensional change in the arrangement pattern reduces the vertical depth required while maintaining electrical independence, thereby reducing the aspect ratio without compromising functionality.
Solution Approach 2:
The patent divides the contact areas into multiple discrete stepped grooves that are laterally offset from each other. By segmenting the connection points and distributing them across different horizontal positions, the structure achieves independent electrical pathways while reducing the depth each individual groove must penetrate, thus lowering the aspect ratio.
2Productivity
If contact plugs are connected to conductive patterns at different heights, then three-dimensional memory device integration is improved, but the manufacturing process becomes more complex
Solution Approach 1:
The patent employs a laterally offset arrangement of stepped grooves that creates a staggered pattern. This approach maintains the three-dimensional integration benefits by providing multiple independent contact pathways, while the systematic lateral displacement simplifies the manufacturing process by creating a more regular, predictable pattern that is easier to align and fabricate compared to vertically stacked grooves.
Solution Approach 2:
The patent applies different horizontal positions for adjacent stepped grooves, creating local variations in the lateral direction. This local quality differentiation allows each groove to access its specific conductive pattern at the optimal location, improving integration while the systematic nature of the offset arrangement keeps the manufacturing process manageable through localized rather than globally complex operations.
Data Source
AI summary
A semiconductor device includes a substrate including a cell area, a first contact area, and a second contact area; a lower stacked structure extending over the second contact area from the cell area; an upper stacked structure extending over the first contact area from the cell area, the upper stacked structure leaving the second contact area open; N (N is a natural number of 2 or more) first group of stepped grooves penetrating at least one portion of the upper stacked structure in the first contact area; and M (M is a natural number equal to or smaller than N) second group of stepped grooves penetrating at least one portion of the lower stacked structure in the second contact area.