Stepped IC Substrate Layout for Thinner Dense Package Stacking
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Solution Overview
Problem
The integrated circuit industry faces challenges in producing faster, smaller, and thinner integrated circuit packages due to limitations in increasing integration density and reducing dimensional dimensions, which affects the surface area and thickness of electronic products.
Innovation Solution
The use of a stepped electronic substrate with a first surface and an opposing second surface, where the first surface has a first and second surface portion, and an anisotropic conductive layer on the second surface to electrically couple integrated circuit assemblies, allowing for reduced thickness and increased integration density.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If traditional planar substrates are used for integrated circuit packages, then manufacturing and assembly are simpler, but the packages cannot achieve sufficient thickness reduction and integration density
Solution Approach 1:
The substrate is divided into multiple planar sections at different vertical levels (first surface portion, second surface portion, third surface portion) forming a stepped structure. This segmentation allows different integrated circuit devices to be mounted at different heights, enabling thick devices to be positioned on higher surfaces while thinner devices or interconnect structures occupy lower surfaces, thereby achieving both high integration density and manageable manufacturing complexity
Solution Approach 2:
The substrate transitions from a traditional two-dimensional planar structure to a three-dimensional stepped structure with multiple vertical levels. This dimensional change enables vertical stacking of electronic components and interconnect structures, allowing the package to achieve greater integration density and thickness reduction by utilizing the vertical dimension for routing and component placement
2Productivity
If integration density is increased through multi-device or multi-chip packages, then faster performance is achieved, but the surface area and dimensional requirements increase
Solution Approach 1:
By introducing vertical levels through the stepped substrate structure, the patent enables multiple integrated circuit devices to be stacked at different heights rather than spreading them out horizontally. The first surface portion, second surface portion, and third surface portion create vertical tiers for component placement, reducing the horizontal footprint while maintaining high integration density
Solution Approach 2:
The stepped substrate structure creates nested vertical levels where higher surfaces are supported by and integrated with lower surfaces. Integrated circuit devices can be positioned on different tiers, with interconnect structures routing signals vertically between levels, effectively nesting multiple functional layers within a compact vertical space
3Length of stationary object
If dimensional reduction is implemented to reduce package thickness, then overall product thickness decreases, but manufacturing precision and electrical connectivity become more difficult to maintain
Solution Approach 1:
The stepped substrate segments the vertical space into distinct levels, allowing interconnect structures to be distributed across multiple surfaces rather than compressed into a single thin layer. This segmentation maintains adequate spacing for electrical connections while achieving overall thickness reduction, as each surface portion can be optimized for its specific function
Solution Approach 2:
By utilizing vertical levels created by the stepped structure, the patent provides additional dimensional space for routing interconnect structures between integrated circuit devices. This allows electrical connections to be established across vertical distances rather than requiring precise lateral alignment in a compressed planar space, thereby maintaining manufacturing precision while reducing overall package thickness
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enables the fabrication of thinner and more densely integrated circuit packages, reducing the surface area and overall thickness of electronic products while maintaining effective electrical connectivity.
Implementation Method 1
an anisotropic conductive layer on the second surface portion to electrically couple integrated circuit assemblies
Data Source
AI summary
An integrated circuit assembly may be formed comprising a stepped electronic substrate having a first surface and an opposing second surface, wherein the first surface comprises a first surface portion or lower step and a second surface portion or upper step. At least one integrated circuit device may be electrically attached to the first surface portion of the first surface of the stepped electronic substrate and an anisotropic conductive layer on the second surface portion of the first surface of stepped electronic substrate. The anisotropic conductive layer may be used to electrically couple the integrated circuit assembly with an additional integrated circuit assembly.