Stepped Insulating Films for Memory Contact Alignment
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Solution Overview
Problem
The miniaturization of semiconductor devices leads to increased manufacturing difficulties, including alignment challenges, current leakage, and short circuits, which degrade device performance and yield.
Innovation Solution
A memory device structure and method involving a substrate with a bit line, multiple insulating films of different materials, and a contact with a unique width profile, allowing for improved alignment and electrical connection of subsequent components.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If semiconductor devices are miniaturized to increase integration density, then device capacity and integration are improved, but manufacturing precision and alignment accuracy deteriorate
Solution Approach 1:
The patent applies preliminary action by forming the insulating film structure with stepped surfaces before forming the contact hole. The first, second, and third insulating films are deposited sequentially with different etch selectivities, creating a pre-configured stepped structure that guides subsequent contact hole formation and ensures proper alignment without requiring high-precision alignment during contact formation.
Solution Approach 2:
The patent applies local quality by using different materials for different insulating films at different locations. The first insulating film (e.g., silicon oxide), second insulating film (e.g., silicon nitride), and third insulating film (e.g., silicon oxide) have different etch selectivities, allowing selective removal of specific layers to create the stepped structure. This local material differentiation enables precise control over the contact hole formation process.
2Quantity of substance
If device size is reduced to improve miniaturization, then integration density is improved, but device reliability and yield worsen due to current leakage and short circuits
Solution Approach 1:
The stepped insulating film structure is formed in advance to create a tapered contact hole profile. This preliminary structure ensures that the contact hole walls are sufficiently wide at deeper levels, preventing current leakage and short circuits while maintaining small device dimensions. The structure is prepared before contact formation to ensure reliability.
Solution Approach 2:
The patent creates an asymmetric contact hole profile through the stepped insulating film structure, where the contact hole width varies with depth. The contact hole is wider at the bottom than at the top, creating a tapered shape that improves electrical connection reliability and prevents short circuits while maintaining compact device size.
3Device complexity
If conventional planar contact structure is used, then device structure is simple, but alignment difficulty increases and process window narrows
Solution Approach 1:
The patent forms the stepped insulating film structure as a preliminary step before contact hole formation. This pre-configured structure with different surface levels serves as a built-in alignment guide, making it easier to align subsequent layers and components without increasing overall device complexity.
Solution Approach 2:
The patent transitions from a two-dimensional planar contact structure to a three-dimensional stepped structure by adding vertical dimensionality through multiple insulating film layers. This dimensional change provides additional alignment references and improves the process window without significantly increasing lateral device complexity.
Data Source
AI summary
A memory device includes a substrate, a bit line, a first insulating film, a second insulating film, a third insulating film, and a contact. The bit line is disposed over the substrate. The first insulating film is disposed on a sidewall of the bit line. The second insulating film is disposed on the first insulating film and is made of a different material than the first insulating film. The third insulating film is disposed on the second insulating film and is made of a different material than the second insulating film. The top surfaces of the second insulating film and the third insulating film are lower than the top surface of the first insulating film. The contact is disposed over the substrate and adjacent to the bit line. The width of the lower portion of the contact is less than the width of the upper portion of the contact.