Stepped Interposer Packaging to Reduce SOC Module Warpage
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Solution Overview
Problem
The fabrication processes of semiconductor packages incorporating System on a Chip (SOC) modules are complicated and not cost-effective, leading to potential device performance issues due to package-in-package structures that cause warpage.
Innovation Solution
A method involving a package substrate with a bridge interposer and a step interposer is used, allowing for the mounting of semiconductor dice in a stepwise manner, followed by a single encapsulation with a mold cap to form an integral device, simplifying the process and reducing warpage.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If package-in-package structures are used to incorporate SOC modules with other semiconductor modules, then device functionality and performance are improved, but manufacturing complexity increases and warpage occurs
Solution Approach 1:
The interposer is divided into a first interposer and a second interposer with different heights, creating a step structure. This segmentation allows different semiconductor modules to be mounted at different levels, enabling SOC modules and other modules to coexist without requiring complex package-in-package structures, thereby reducing manufacturing complexity while maintaining device functionality.
Solution Approach 2:
The patent introduces a vertical dimension by creating a step structure with different interposer heights. This dimensional change allows multiple semiconductor modules to be arranged at different elevation levels on the same substrate, eliminating the need for nested package-in-package structures and simplifying the manufacturing process while preserving the ability to integrate multiple functionalities.
2Adaptability or versatility
If package-in-package structures are used to incorporate SOC modules, then device functionality is enhanced, but device performance deteriorates due to warpage
Solution Approach 1:
By segmenting the interposer into two separate interposers with different heights, the patent creates a step structure that accommodates different module types without requiring package-in-package construction. This eliminates the warpage issues associated with nested packages while maintaining the ability to integrate SOC modules and other semiconductor modules, thus preserving device functionality and improving reliability.
Solution Approach 2:
The first and second interposers act as intermediary structures between the substrate and different semiconductor modules. These interposers with different heights serve as mediators that enable direct mounting of various modules at appropriate levels, eliminating the need for package-in-package structures and preventing warpage while maintaining device functionality.
3Adaptability or versatility
If complicated fabrication processes are used to incorporate SOC modules and other semiconductor modules, then device functionality is improved, but manufacturing cost increases
Solution Approach 1:
The segmented interposer structure with two interposers of different heights enables a simplified fabrication process. Instead of requiring complex package-in-package assembly, the step structure allows direct mounting of different semiconductor modules at different levels, reducing manufacturing steps and costs while maintaining the ability to integrate SOC modules and other modules for enhanced device functionality.
Solution Approach 2:
By utilizing the vertical dimension through stepped interposers, the patent enables multiple modules to be arranged at different heights on the same substrate. This approach simplifies the fabrication process compared to package-in-package structures, as it eliminates the need for nested assembly and complex alignment procedures, thereby reducing manufacturing costs while preserving device functionality.
Data Source
AI summary
An electronic device and a method for forming the same are provided. The method comprises: providing a package substrate; forming a bridge interposer within the package substrate and exposing a top surface of the bridge interposer; attaching a step interposer on the top surface of the bridge interposer, wherein the step interposer defines a step structure; mounting a bottom semiconductor die on the package substrate and adjacent to the step interposer; mounting one or more upper semiconductor dice on both of the bottom semiconductor die and the step structure of the step interposer to electrically couple each of the one or more upper semiconductor dice with the bridge interposer; mounting an electronic component on the top surface of the bridge interposer to electrically couple the electronic component with the one or more upper semiconductor dice; and forming a mold cap on the package substrate.