Stepped Isolation Insulator for Flash Memory Stress Relief

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Solution Overview

Problem

The scaling down of semiconductor elements in flash memory leads to the use of low-viscosity filling materials that cause stress, resulting in crystal defects in semiconductor regions, which deteriorate the characteristics of the elements formed.

Innovation Solution

The semiconductor memory design incorporates a unique isolation insulator structure with a stepped upper surface, where the first isolation film is set back closer to the semiconductor substrate than the second film, reducing the volume of the insulator and minimizing stress on the active region, thereby reducing crystal defects and improving element characteristics.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Quantity of substance

If element scaling-down is carried out for higher storage density, then storage density is improved, but crystal defects are produced in semiconductor regions due to stress from low-viscosity filling materials

Engineering Contradiction:
Improvestorage densityVSAvoidelement characteristics
Core Design Contradiction:
Quantity of substanceVSReliability

Solution Approach 1:

The patent applies local quality by creating a stepped upper surface structure in the isolation insulator where different regions have different heights. The first isolation film is set back closer to the semiconductor substrate than the second film, creating localized stress relief zones. This local structural variation reduces stress concentration in critical areas while maintaining overall isolation functionality, thereby preventing crystal defects in the semiconductor region.

Inventive Principle:
Principle #3Local quality

2Ease of manufacture

If a low-viscosity filling material is used to fill the space between element regions, then ease of manufacture is improved, but stress is produced that creates crystal defects

Engineering Contradiction:
Improvefilling processVSAvoidcrystal defect production
Core Design Contradiction:
Ease of manufactureVSReliability

Solution Approach 1:

The patent changes the geometric parameters of the isolation insulator by creating a stepped upper surface with two different film heights. This parameter modification allows the low-viscosity filling material to be used for ease of manufacture while the stepped structure redistributes the stress field, preventing stress concentration that would cause crystal defects in the semiconductor region.

Inventive Principle:
Principle #35Parameter changes

3Reliability

If the volume of the isolation insulator is reduced by setting back the first film, then stress on the active region is minimized, but device complexity increases

Engineering Contradiction:
Improvecrystal defect reductionVSAvoidisolation insulator structure
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The isolation insulator is segmented into two distinct films with different heights: a first isolation film set back closer to the semiconductor substrate and a second film extending higher. This segmentation reduces the overall volume of the isolation insulator, minimizing stress on the active region and preventing crystal defects, while the segmented structure itself is achieved through standard semiconductor manufacturing processes.

Inventive Principle:
Principle #1Segmentation

Data Source

PatentUS9070743B2Semiconductor memory and manufacturing method of the same
Publication Date: 2015.06.30 KIOXIA CORP
  • US9070743B2 patent drawing
  • US9070743B2 patent drawing
  • US9070743B2 patent drawing

AI summary

According to one embodiment, a semiconductor memory includes a memory cell in a memory cell array which is provided in a semiconductor substrate and which includes a first active region surrounded by a first isolation insulator, a transistor in a transistor region which is provided in the semiconductor substrate and which includes second active regions surrounded by a second isolation insulator. The second isolation insulator includes a first film, and a second film between the first film and the second active region, and the upper surface of the first film is located closer to the bottom of the semiconductor substrate than the upper surface of the second film.