Stepped Pad Structure in Stacked Chips for Stable Solder Joints

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

There is a challenge in developing semiconductor packages that are both high-performance and slim, while also achieving multi-functionality, high capacity, and miniaturization.

Innovation Solution

The semiconductor package includes a stacked configuration of multiple semiconductor chips with pads having a stepped structure, where the first pad on the top surface of the second semiconductor chip has a first portion and a second portion protruding vertically, and a solder ball surrounds the sidewall of the second portion between the first and second pads.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If multiple semiconductor chips are integrated into one package to achieve high capacity and miniaturization, then the functionality and capacity of the package are improved, but the complexity of the package structure increases

Engineering Contradiction:
Improvemulti-functionalityVSAvoidpackage structure complexity
Core Design Contradiction:
Adaptability or versatilityVSDevice complexity

Solution Approach 1:

Multiple semiconductor chips are stacked vertically in a nested configuration, with each chip containing pads that extend through or between chips. This nesting approach allows multiple functional units to be integrated in a compact vertical arrangement, achieving high capacity and multi-functionality while controlling package footprint.

Inventive Principle:
Principle #7Nested doll (Nesting)

Solution Approach 2:

The pad structures extend in the vertical dimension rather than only horizontal planes. Pads protrude from chip surfaces and extend through intermediate spaces, utilizing the vertical dimension to create electrical connections between stacked chips without requiring larger horizontal spacing.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

2Length of stationary object

If the thickness of semiconductor packages is decreased to make devices slimmer, then the profile of electronic devices is improved, but the space for electrical connections and signal transmission is reduced

Engineering Contradiction:
Improvepackage thicknessVSAvoidsignal transmission capability
Core Design Contradiction:
Length of stationary objectVSEase of operation

Solution Approach 1:

Electrical connections are established by extending pads vertically through the package thickness rather than requiring long horizontal traces. This vertical routing through vias and protruding pads reduces the horizontal distance signals must travel while maintaining connection integrity across thin package profiles.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Solution Approach 2:

The electrical connection path is segmented into discrete vertical elements (protruding pads, solder balls, vias) distributed through the package thickness. This segmentation allows signals to transition between chips at multiple intermediate points rather than requiring single long-distance connections, improving signal integrity in thin packages.

Inventive Principle:
Principle #1Segmentation

3Reliability

If pads are designed with stepped structure to improve solder ball stability, then the reliability of connections is improved, but the manufacturing precision requirements increase

Engineering Contradiction:
Improvesolder ball stabilityVSAvoidpad structure precision
Core Design Contradiction:
ReliabilityVSManufacturing precision

Solution Approach 1:

The pad structure features localized geometric variations with different widths at different heights (stepped configuration). The upper portion has a narrower width while the lower portion has a wider base, creating a stepped profile that mechanically stabilizes solder balls while using standard fabrication techniques.

Inventive Principle:
Principle #3Local quality

Data Source

PatentUS12237309B2Semiconductor package having pads with stepped structure
Publication Date: 2025.02.25 SAMSUNG ELECTRONICS CO LTD
  • US12237309B2 patent drawing
  • US12237309B2 patent drawing
  • US12237309B2 patent drawing

AI summary

A semiconductor package including a first semiconductor chip, a second semiconductor chip disposed on the first semiconductor chip, and a third semiconductor chip disposed on the second semiconductor chip. A first pad is disposed on a top surface of the second semiconductor chip, and includes a first portion and a second portion protruding in a vertical direction from the first portion. A width of the first portion in a first horizontal direction is greater than a width of the second portion in the first horizontal direction. A second pad is disposed on a bottom surface of the third semiconductor chip facing the top surface of the second semiconductor chip, and a solder ball is disposed as surrounding a sidewall of the second portion of the first pad between the first pad and the second pad.