Stepped Photoresist Stack Patterning for Lower-Cost Lithography
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Solution Overview
Problem
The semiconductor integrated circuit (IC) manufacturing process, particularly photolithography, faces high costs and complexity due to the need for advanced processing and materials, with existing lithography methods being inefficient and costly.
Innovation Solution
A photomask with multiple attenuating mask patterns and a two-exposure-two-development process is used to pattern two photoresist layers, allowing for the formation of a composite photoresist stack with stepped sidewalls, enabling efficient transfer of patterns to the substrate and reducing manufacturing costs and cycle time.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If conventional photolithography processes are used to pattern photoresist layers, then manufacturing precision can be achieved, but manufacturing cost and process complexity increase significantly
Solution Approach 1:
The patent combines multiple photolithography operations into a single exposure step by stacking multiple photoresist layers with different exposure thresholds. This merging approach maintains pattern transfer precision while significantly reducing process complexity and manufacturing cost, as the combined structure can be exposed and developed in one operation rather than requiring separate exposure and development steps for each layer
2Manufacturing precision
If multiple photolithography steps are performed to create complex patterns, then manufacturing precision improves, but manufacturing time and cost increase
Solution Approach 1:
The patent applies preliminary action by pre-stacking multiple photoresist layers with different exposure thresholds before the exposure process. This preliminary preparation enables all layers to be exposed and developed simultaneously in a single photolithography operation, achieving complex pattern definition accuracy without requiring multiple sequential steps, thereby significantly reducing manufacturing cycle time and improving productivity
3Manufacturing precision
If advanced photolithography methods are used to achieve desired sidewall profiles, then manufacturing precision improves, but manufacturing cost increases
Solution Approach 1:
The patent applies local quality by using photoresist layers with different exposure thresholds at different positions in the stack. Each layer responds differently to the exposure radiation based on its local threshold properties, enabling precise control of sidewall profiles (vertical or inclined) in different regions. This approach achieves manufacturing precision for sidewall profile control while using standard photolithography equipment, thereby reducing manufacturing cost compared to advanced specialized methods
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This method simplifies the semiconductor structure formation process, reduces manufacturing costs, and improves product flexibility by enabling the creation of integrated circuit features with desired profiles, such as vertical or inclined sidewalls, while maintaining process simplicity suitable for mass production.
Implementation Method 1
a first mask pattern 14 and a second mask pattern 16 over the first mask pattern 14 and having a second transmittance T2 to the exposure radiation. The second transmittance T2 is less than the first transmittance T1
Implementation Method 2
A first photoresist layer 116 and a second photoresist layer 118 are formed on the multi-layer structure 114
Data Source
AI summary
A method of forming a semiconductor structure is disclosed. A multi-layer structure is formed over a substrate. A photoresist stack with a stepped sidewall is formed on the multi-layer structure. A pattern of the photoresist stack is transferred to the multi-layer structure.