Stepped Protective Layer in Semiconductor Memory Gates

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Solution Overview

Problem

The miniaturization of semiconductor devices leads to issues such as leakage current between adjacent components due to shrinking sizes, which existing semiconductor structures and methods have not adequately addressed, affecting performance and reliability.

Innovation Solution

A semiconductor structure with a protective layer having a stepped portion is formed, which reduces damage during the etching process, improving electrical properties and reliability by using a capping layer as an etching mask to create a stepped shape in the protective layer, thereby protecting the control gate from plasma implantation and preventing leakage current.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Quantity of substance

If the size of non-volatile memory devices is continuously reduced to increase density, then device density and performance are improved, but leakage current between adjacent components increases

Engineering Contradiction:

Improvedevice densityVSAvoidleakage current

Core Design Contradiction:

Quantity of substanceVSObject-generated harmful factors

Solution Approach 1:

The protective layer is divided into different height levels (first height in peripheral region, second height in active region), creating segmented protection zones that address different functional requirements in different device regions

Inventive Principle:

Principle #1Segmentation

Solution Approach 2:

Different regions of the protective layer are given different heights and protection levels - the peripheral region has greater height for robust protection during processing, while the active region has reduced height to prevent leakage current between adjacent components

Inventive Principle:

Principle #3Local quality

2Ease of manufacture

If conventional etching processes are used without a stepped protective layer, then manufacturing simplicity is maintained, but damage to control gate and other components occurs during etching

Engineering Contradiction:

Improvemanufacturing simplicityVSAvoidcomponent integrity

Core Design Contradiction:

Ease of manufactureVSReliability

Solution Approach 1:

The stepped protective layer is formed in advance before the etching process, with the capping layer patterned to create different protection heights in different regions, preparing the structure to withstand subsequent etching operations

Inventive Principle:

Principle #10Preliminary action

Solution Approach 2:

The protective layer acts as a cushioning barrier formed beforehand to absorb and protect underlying components (control gate, dielectric stack) from damage during the etching process, preventing plasma implantation and physical damage

Inventive Principle:

Principle #11Beforehand cushioning (Prior cushioning)

3Device complexity

If a uniform protective layer is used across all regions, then manufacturing complexity is reduced, but damage to control gate during etching process increases

Engineering Contradiction:

Improveprotective layer structureVSAvoidcontrol gate protection

Core Design Contradiction:

Device complexityVSReliability

Solution Approach 1:

The protective layer is segmented into different height levels using a capping layer mask, creating first and second protective layers with different heights to provide differentiated protection for different regions

Inventive Principle:

Principle #1Segmentation

Solution Approach 2:

The protective layer structure is optimized locally - the peripheral region receives greater protection (first height) while the active region receives appropriate protection (second height), matching the specific protection needs of each region

Inventive Principle:

Principle #3Local quality

4Reliability

If the protective layer thickness is increased to prevent leakage current, then electrical properties are improved, but damage to other components during etching increases

Engineering Contradiction:

Improveelectrical propertiesVSAvoidetching damage

Core Design Contradiction:

ReliabilityVSObject-affected harmful factors

Solution Approach 1:

The protective layer is segmented into different thicknesses - thicker in peripheral region for etching protection, thinner in active region to maintain electrical properties and prevent leakage current

Inventive Principle:

Principle #1Segmentation

Solution Approach 2:

Different thicknesses of protective layer are applied to different regions based on their specific requirements - peripheral region gets thicker protection, active region gets optimized thickness for electrical performance

Inventive Principle:

Principle #3Local quality

Data Source

PatentUS20240387666A1Semiconductor structure and method of forming the same

Publication Date: 2024.11.21 WINBOND ELECTRONICS CORP

AI summary

A semiconductor structure and a method of forming the same are provided. The semiconductor structure includes a substrate, a floating gate, a dielectric stack, a control gate, and a protective layer. The substrate includes an active region and a peripheral region. The floating gate is disposed on the substrate. The dielectric stack is disposed on the floating gate. The control gate is disposed on the dielectric stack. The protective layer is disposed on the control gate. The protective layer located in the active region has a stepped portion.