Stepped Ramp Generator for Missing-Code-Free Image Sensor ADCs
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Solution Overview
Problem
Two-step slope analog-to-digital converters (ADCs) generate code errors, including missing codes, due to discordance between the steps of their ramp signals when processing a large number of pixels, requiring higher processing speeds and complex ramp signal generators.
Innovation Solution
A stepped ramp signal generator that uses a ramp signal generation unit with matching resistors and holders to store and transfer final values between resistors, ensuring that the maximum value of a previous stepped ramp signal is used as the initial value of the next, thereby maintaining signal continuity and preventing missing codes.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If a two-step slope ADC is used to increase processing speed for large numbers of pixels, then productivity is improved, but device complexity increases due to requiring a two-step ramp signal generator
Solution Approach 1:
The ramp signal generation is divided into two separate steps: a first stepped ramp signal for coarse conversion and a second stepped ramp signal for fine conversion. This segmentation allows each step to handle specific portions of the conversion task, improving overall processing speed while maintaining manageable complexity through modular design
Solution Approach 2:
The first stepped ramp signal performs preliminary analog-to-digital conversion to generate an initial digital value before the second stepped ramp signal performs the fine conversion. This preliminary action reduces the burden on the second step, enabling faster overall processing without requiring the second ramp generator to be overly complex
2Device complexity
If the maximum value of the first stepped ramp signal differs from the initial value of the second stepped ramp signal, then device complexity is reduced, but manufacturing precision deteriorates due to code errors and missing codes
Solution Approach 1:
The circuit uses feedback mechanisms where the final value of the first stepped ramp signal is fed back to become the initial value of the second stepped ramp signal. This feedback loop ensures continuity between steps, preventing code errors and missing codes while maintaining manufacturing precision without significantly increasing device complexity
Solution Approach 2:
The circuit dynamically changes the parameter (initial value) of the second stepped ramp signal based on the output of the first stepped ramp signal. By adjusting the initial value parameter to match the previous maximum value, the system maintains precision across the two-step conversion process
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution effectively minimizes the generation of missing codes by ensuring consistent signal transitions across steps, enhancing the accuracy and efficiency of the ADC process, especially in high-resolution image processing applications.
Implementation Method 1
the holder includes at least one of: (1) a capacitive element that stores the final value across the previous matching resistor
Implementation Method 2
a switching element configured to perform an switching operation to allow the final value across the previous matching resistor to store in the capacitive element
Implementation Method 3
a buffer configured to provide the final value stored in the capacitive element to the next matching resistor
Implementation Method 4
a current mirror configured to apply an identical current to the matching resistors of the ramp signal generation unit in response to the first and second signals
Data Source
AI summary
A stepped ramp signal generator includes a ramp signal generation unit configured to provide final values of previous stepped ramp signals as initial values of the next stepped ramp signals. The ramp signal generation unit includes a plurality of matching resistors, and a plurality of holders installed between the matching resistors, each holder storing a final value across a previous matching resistor and providing the final value to a next matching resistor.