Stepped Redistribution Structure to Prevent Package Delamination
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Solution Overview
Problem
Existing semiconductor packages face challenges in reliability due to delamination issues between the mold layer and redistribution substrates caused by thermal/physical characteristic differences, which affect the durability and performance of the packages.
Innovation Solution
A semiconductor package design featuring a second redistribution substrate with a stepwise structure and a conductive pillar that penetrates the mold layer to connect the substrates, along with a method of fabrication that includes forming via holes and redistribution patterns to enhance electrical connectivity and reduce delamination risks.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a conventional semiconductor package structure is used with uniform substrate thickness, then the fabrication process is simpler, but delamination occurs between the mold layer and redistribution substrate due to thermal/physical characteristic differences
Solution Approach 1:
The second redistribution substrate is divided into different thickness regions (first thickness region and second thickness region) to create a stepped structure. This segmentation allows different portions of the substrate to have different thermal mass and expansion characteristics, reducing stress concentration at the mold layer interface and preventing delamination while maintaining overall structural integrity.
Solution Approach 2:
The substrate thickness is locally varied to create specific functional zones. The first thickness region (thinner) is positioned where stress relief is needed to prevent mold layer delamination, while the second thickness region (thicker) provides structural support in areas requiring higher mechanical strength. This local quality adjustment optimizes both reliability and stress distribution.
2Ease of manufacture
If the second redistribution substrate has a uniform thickness, then the manufacturing process is easier, but thermal stress causes delamination between layers
Solution Approach 1:
The substrate is segmented into multiple thickness regions during the fabrication process. By forming the second redistribution substrate with a stepped structure (different thickness regions) rather than uniform thickness, the patent reduces thermal stress concentration during bonding while maintaining manufacturability through standard semiconductor fabrication techniques such as selective etching or deposition.
Solution Approach 2:
The thickness parameter of the second redistribution substrate is changed across different regions. By varying the thickness parameter (creating first and second thickness regions), the thermal mass and expansion characteristics are adjusted locally to reduce thermal stress during bonding and operation, thereby preventing delamination while remaining compatible with standard manufacturing processes.
3Reliability
If via holes are formed to penetrate the mold layer for electrical connection, then electrical connectivity between substrates is improved, but the mold layer integrity is compromised
Solution Approach 1:
Conductive pillars are introduced as intermediary structures to establish electrical connections between the first and second redistribution substrates. These pillars are formed within via holes that penetrate the mold layer, serving as mediators that provide reliable electrical conductivity while the surrounding mold layer material maintains structural support. The pillars act as reinforced elements that compensate for the integrity reduction caused by the via holes.
Solution Approach 2:
The connection structure utilizes composite materials combining the mold layer (providing mechanical support and insulation) and conductive pillar material (providing electrical conductivity). This composite approach allows the via holes to penetrate the mold layer for electrical connection while the combination of materials maintains overall structural integrity through the reinforcing presence of the conductive pillars and surrounding mold layer.
Data Source
AI summary
A semiconductor package includes a first semiconductor device on a first redistribution substrate, a first mold layer that covers the first semiconductor device and the first redistribution substrate, and a second redistribution substrate on the first mold layer, the second redistribution substrate including a first opening that exposes a top surface of the first mold layer, a sidewall of the second redistribution substrate that is exposed to the first opening having a stepwise structure.