Stepped Semiconductor Structure for DRAM Leakage Isolation
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Solution Overview
Problem
Recessed access devices in DRAMs experience leakage issues that can reduce performance and lead to failure during margin tests, as activation of one portion can cause leakage to unactivated areas.
Innovation Solution
A semiconductor structure is created with a substrate having a boron-implanted p-type surface, where a first dielectric layer is formed on the substrate and a second dielectric layer is deposited on top, forming a stepped structure that blocks leakage by increasing the p-type concentration, thereby preventing diffusion to other substrate portions.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If recessed access device is activated, then access function is improved, but leakage is generated that reduces performance
Solution Approach 1:
The patent applies local quality by creating a p-type region at the first top surface of the substrate through boron implantation. This localized doping creates a specific electrical property (p-type concentration) at the leakage-prone interface, which blocks leakage current while maintaining the access device functionality in other regions.
Solution Approach 2:
The p-type region acts as an intermediary layer between the recessed access device and the substrate. This intermediate region with increased p-type concentration serves as a barrier that prevents leakage from propagating, mediating between the activated device and the substrate to block harmful leakage current.
2Reliability
If boron implantation is performed to increase p-type concentration, then leakage is blocked, but manufacturing complexity increases
Solution Approach 1:
The boron implantation is performed as a preliminary action during the manufacturing process, specifically after etching the substrate to create the stepped structure and before forming the dielectric layers. By incorporating the doping step early in the process sequence, the patent establishes the leakage-blocking p-type region before subsequent processing, simplifying the overall manufacturing flow.
3Reliability
If stepped structure is created with dielectric layers, then leakage path is blocked, but manufacturing precision requirements increase
Solution Approach 1:
The patent utilizes the vertical dimension by creating a stepped substrate structure with different surface levels (first top surface and second top surface). The dielectric layers are deposited conformally on this three-dimensional structure, with the first dielectric layer extending to the sidewall. This vertical arrangement naturally blocks leakage paths by creating physical separation and different potential barriers, leveraging spatial dimensionality rather than relying solely on planar precision.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The boron implantation effectively blocks leakage, enhancing the semiconductor structure's performance and preventing failure during margin tests by isolating activated and unactivated areas.
Implementation Method 1
The first top surface of the substrate is implanted by boron to increase a p-type concentration of the first top surface of the substrate
Data Source
AI summary
A manufacturing method of a semiconductor structure includes: etching a substrate such that the substrate has a first top surface and a second top surface higher than the first top surface; implanting the first top surface of the substrate by boron to increase a p-type concentration of the first top surface of the substrate; forming a first dielectric layer on the substrate; and forming a second dielectric layer on the first dielectric layer.