Stepped Stack Sidewalls for Crack-Resistant Dielectric Fill
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Solution Overview
Problem
During the fabrication of vertical memory arrays, the fill material in large openings of semiconductor devices is prone to cracking and delamination due to thermal treatment and abrasive planarization, which becomes more significant as the number of tiers increases.
Innovation Solution
A stepped profile is formed on the sidewalls of the stack by a 'trim-etch-trim' process, preventing cracks from forming or propagating in the fill material during stress applications like chemical mechanical planarization.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If a large volume of fill material is used to fill the opening, then the opening is completely filled, but cracking and delamination occur during thermal treatment and planarization
Solution Approach 1:
The patent introduces a stress relief structure that segments the continuous fill material into distinct regions. This stress relief structure creates a discontinuity in the fill material column, allowing stress to be distributed and relieved at the interface between the fill material and the stress relief structure, preventing crack propagation through the entire fill material volume.
Solution Approach 2:
The stress relief structure acts as an intermediary element between the fill material and the surrounding environment. It serves as a buffer that absorbs and redistributes mechanical stress during thermal treatment and planarization processes, protecting the fill material from direct stress that would cause cracking and delamination.
2Manufacturing precision
If thermal treatment and abrasive planarization are applied to densify and planarize the fill material, then the top surface is planarized, but mechanical stress causes cracking and delamination
Solution Approach 1:
The stress relief structure is formed beforehand, prior to filling the opening with fill material. This pre-formed structure provides a cushioning effect that anticipates and mitigates the mechanical stress that will be applied during subsequent thermal treatment and planarization processes, preventing cracking before it occurs.
Solution Approach 2:
The stress relief structure serves as an intermediary that mediates between the applied mechanical stress and the fill material. During planarization, the stress relief structure absorbs and redistributes the mechanical stress, allowing the fill material to be planarized without developing cracks or delaminating from surrounding structures.
3Productivity
If the number of tiers in the vertical memory array increases to increase memory density, then memory density improves, but cracking and delamination of fill material becomes more problematic
Solution Approach 1:
As the number of tiers increases, the stress relief structure segments the fill material into manageable sections. This segmentation prevents stress from accumulating continuously through multiple tiers, allowing the structure to accommodate higher memory density while maintaining fill material integrity through distributed stress management.
Data Source
AI summary
A method of forming a semiconductor device comprising forming a patterned resist over a stack comprising at least one material and removing a portion of the stack exposed through the patterned resist to form a stack opening. A portion of the patterned resist is laterally removed to form a trimmed resist and an additional portion of the stack exposed through the trimmed resist is removed to form steps in sidewalls of the stack. A dielectric material is formed between the sidewalls of the stack to substantially completely fill the stack opening, and the dielectric material is planarized. Additional methods are disclosed, as well as semiconductor devices.