Stepped Source/Drain Structure for Uniform Epitaxial Formation
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Solution Overview
Problem
The uneven etching of semiconductor materials during the removal of a sacrificial layer in nanosheet field effect transistor (FET) fabrication leads to remnants that interfere with the epitaxial deposition of source/drain structures, causing inconsistency in the formation process.
Innovation Solution
A method involving selective etching of channel layers and sacrificial layers to create a stepped profile, followed by epitaxial growth of source/drain structures with self-aligned substrate isolation, ensuring even etching and consistent deposition.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If selective etching is used to remove sacrificial layers, then source/drain region clearing is achieved, but uneven etching causes remnants that interfere with epitaxial deposition
Solution Approach 1:
The patent applies preliminary action by performing a recess etch on the channel layers before the main sacrificial layer removal process. This pre-recessing of the channel layers to a lower elevation creates a stepped structure that prevents etching remnants from interfering with subsequent epitaxial deposition, thereby solving the contradiction between easy manufacture and manufacturing precision
Solution Approach 2:
The etching process is segmented into multiple stages: first recessing the channel layers, then removing the sacrificial layers. This segmentation allows each etching step to be optimized independently, ensuring complete removal of sacrificial material without leaving remnants that would compromise epitaxial deposition quality
2Device complexity
If standard etching processes are used, then fabrication simplicity is maintained, but source/drain structure formation consistency deteriorates
Solution Approach 1:
The patent introduces a preliminary recess etching step that creates a stepped profile before main etching. This additional step, while increasing process complexity, ensures reliable and consistent source/drain structure formation by preventing etching remnants from interfering with epitaxial growth
Solution Approach 2:
The patent introduces a vertical dimension step by recessing channel layers to a lower elevation than the sacrificial layers. This dimensional change creates a stepped structure that physically separates the etching zone from the epitaxial deposition zone, ensuring consistent source/drain formation
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach ensures consistent and uniform formation of source/drain structures by aligning etched sacrificial layers with channel layers, preventing remnants that interfere with epitaxial growth, thereby improving the fabrication process.
Implementation Method 1
The channel layers are recessed relative to the second sacrificial layers using a selective isotropic etch
Implementation Method 2
Source/drain structures are grown between the sidewall spacers from side surfaces of the channel layers in a channel region
Data Source
AI summary
Semiconductor devices and methods of forming the same include a substrate having a platform that is raised relative to a remainder of the substrate's surface. The platform includes a stepped profile with a top portion having a smaller width than a width of a base portion. A channel layer is over the platform. A gate stack is on and around the channel layer. First sidewall spacers are on the gate stack, above the channel layer. Source/drain structures are over the platform.


