Stepped Upper Substrate Semiconductor Package for Thin PoP Assembly
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Solution Overview
Problem
The challenge in semiconductor packaging is to minimize the thickness of package-on-package structures while ensuring efficient flux cleaning and encapsulant distribution, which is hindered by traditional designs.
Innovation Solution
The introduction of step structures on the upper substrate, forming channel regions and cavity regions, facilitates reduced joint pitch and ball size, enabling efficient flux cleaning and encapsulant distribution, thereby minimizing the overall package thickness.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Length of moving object
If traditional flat substrate design is used, then manufacturing is simpler, but package thickness cannot be minimized and flux cleaning is inefficient
Solution Approach 1:
The upper substrate is segmented into multiple level surfaces through step structures, creating distinct regions at different heights. This segmentation allows the substrate to perform multiple functions: the first level provides a larger area for connection structures and flux distribution, while the second level accommodates the semiconductor chip and enables encapsulant flow paths, thereby reducing package thickness without compromising manufacturing feasibility
Solution Approach 2:
The substrate design transitions from a two-dimensional flat surface to a three-dimensional stepped structure. By adding the vertical dimension through steps of different heights, the design creates additional space for connection structures and establishes flow paths for encapsulant and flux, achieving thickness reduction while improving cleaning efficiency
2Length of moving object
If joint pitch and ball size are reduced, then package thickness is minimized, but flux cleaning and encapsulant distribution become inefficient
Solution Approach 1:
The step structures create local variations in surface height, with the first level providing a larger area for flux distribution and cleaning, while the second level provides a smaller area for chip mounting. This local quality differentiation ensures that flux can be effectively distributed and cleaned in the first level region, while the second level maintains compact dimensions for thickness reduction
3Reliability
If step structures are added to the upper substrate, then flux cleaning and encapsulant distribution are improved, but manufacturing complexity increases
Solution Approach 1:
The step structures are formed by segmenting the substrate into distinct levels during the substrate fabrication process. This segmentation is integrated into the existing manufacturing workflow, allowing the multi-level structure to be created using standard substrate processing techniques, thereby managing manufacturing complexity while achieving improved encapsulant distribution
Data Source
AI summary
A semiconductor package includes: a lower substrate; a semiconductor chip disposed on the lower substrate; an upper substrate disposed on the semiconductor chip, having a lower surface facing the semiconductor chip, and including step structures disposed below the lower surface; a connection structure disposed around the semiconductor chip and connecting the lower substrate to the upper substrate; and an encapsulant filling a space between the lower substrate and the upper substrate and sealing at least a portion of each of the semiconductor chip and the connection structure. The lower surface of the upper substrate has a first surface portion on which the step structures are disposed and a second surface portion having a step with respect to the lower surface of the step structures, and the second surface portion extends between opposite edges of the upper substrate.