Stepped Conductive Substrate Layout for Shorter Wire Bonds

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Solution Overview

Problem

Existing electronic power substrates are planar, leading to significant downsets between lead frames and die surfaces, resulting in long wire bonds that cause wire clutter, sweeping, and shorting, which affect performance and reliability.

Innovation Solution

A non-planar, stepped or terraced surface is implemented on the electronic power substrate, allowing semiconductor dies to be positioned on different height levels, reducing wire bond lengths and preventing wire sweeping and shorting.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Ease of manufacture

If a planar substrate surface is used, then the manufacturing process is simple, but wire bond length increases causing wire clutter, sweeping, and shorting

Engineering Contradiction:
Improvesubstrate fabrication simplicityVSAvoidwire bond reliability
Core Design Contradiction:
Ease of manufactureVSReliability

Solution Approach 1:

The patent transitions from a two-dimensional planar substrate surface to a three-dimensional stepped surface structure. Multiple conductive layers are formed at different heights, creating vertical stratification that reduces horizontal wire bond travel distance and eliminates wire sweeping issues while maintaining manufacturing feasibility through sequential layer deposition

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

2Device complexity

If a planar substrate surface is used, then the device structure is simple, but wire bond length increases leading to wire clutter and shorting

Engineering Contradiction:
Improvesubstrate structure complexityVSAvoidwire clutter and shorting
Core Design Contradiction:
Device complexityVSObject-generated harmful factors

Solution Approach 1:

The substrate surface is segmented into multiple stepped levels, with each conductive layer forming a distinct step. This segmentation separates previously overlapping wire bond paths into different vertical planes, eliminating wire clutter and shorting hazards while the complexity remains manageable through systematic layer formation

Inventive Principle:
Principle #1Segmentation

3Reliability

If multiple conductive layers at different heights are implemented, then wire bond length is reduced and wire sweeping is prevented, but manufacturing complexity increases

Engineering Contradiction:
Improvewire bond reliabilityVSAvoidsubstrate structure complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

By utilizing the vertical dimension to create stepped conductive layers at different heights, the patent reduces wire bond length and prevents wire sweeping. The manufacturing complexity is managed by forming layers sequentially, with each layer building upon the previous one, transforming a potentially complex 3D structure into a systematic multi-step fabrication process

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Data Source

PatentUS20260011629A1Substrate with stepped conductive layer surface
Publication Date: 2026.01.08 SEMICON COMPONENTS IND LLC
  • US20260011629A1 patent drawing
  • US20260011629A1 patent drawing
  • US20260011629A1 patent drawing

AI summary

A substrate includes a base plate made of an insulating material, a first electrically conductive layer disposed on a first side of the base plate, and a second electrically conductive layer disposed on a second side of the base plate. The first electrically conductive layer has a stepped surface, the stepped surface including a plurality of steps at different heights above the base plate.