Stepped Surface Formation for Multilevel Interconnect Structures
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Solution Overview
Problem
Current methods for forming multilevel metal interconnect structures in semiconductor devices face challenges in providing electrical contacts to multiple levels of conductive metal lines at low cost and with minimal processing complexity, especially in high-density three-dimensional stacked memory structures like BiCS architecture.
Innovation Solution
A method involving the formation of a stack with alternating material layers, where trenches are created and filled with dielectric material, and subsequent etching processes are used to create stepped surfaces and recessed layers, allowing for the formation of retro-stepped dielectric structures and horizontal dielectric fins to facilitate efficient electrical connectivity.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional methods are used to form multilevel metal interconnect structures, then electrical contacts can be provided to multiple levels, but the processing complexity and cost increase significantly
Solution Approach 1:
The patent divides the interconnect structure into multiple alternating layers of first material (e.g., conductive layers) and second material (e.g., dielectric layers). This segmentation allows for systematic formation of electrical contacts at different levels through repeated patterning and etching cycles, reducing overall processing complexity while maintaining contact reliability
Solution Approach 2:
The patent transitions from planar interconnect structures to three-dimensional stacked structures with vertical extent. By forming trenches that extend through multiple alternating layers and creating stepped surfaces at different vertical levels, the patent enables electrical contacts to multiple wiring levels in a compact vertical arrangement, improving density while managing complexity
2Productivity
If three-dimensional stacked memory structure is used to increase wiring density, then ultra high density storage is achieved, but the number of interconnect wiring levels increases leading to higher complexity
Solution Approach 1:
The patent implements a nested structure where alternating layers of conductive and dielectric materials are stacked vertically, with trenches and electrical contacts nested within this layered structure. The stepped surfaces create nested regions that accommodate vias and contacts at different levels, enabling high wiring density while organizing complexity in a systematic nested pattern
Solution Approach 2:
The patent performs preliminary formation of the alternating material layers and trench structures before creating the final electrical contacts. By pre-establishing the layered architecture and stepped surfaces in advance, subsequent contact formation becomes more straightforward, managing complexity through staged fabrication
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enables the cost-effective formation of multilevel metal interconnects with minimal complexity, enhancing the density and efficiency of electrical contacts in three-dimensional memory devices by creating stepped surfaces and dielectric structures that support reliable conductive via contacts.
Implementation Method 1
Portions of the dielectric material liner and portions of the second material layers are removed employing an etch process
Data Source
AI summary
A trench can be formed through a stack of alternating plurality of first material layers and second material layers. A dielectric material liner and a trench fill material portion can be formed in the trench. The dielectric material liner and portions of first material layer can be simultaneously etched to form laterally-extending cavities having level-dependent lateral extents. A set of stepped surfaces can be formed by removing unmasked portions of the second material layers. Alternately, an alternating sequence of processing steps including vertical etch processes and lateral recess processes can be employed to laterally recess second material layers and to form laterally-extending cavities having level-dependent lateral extents. Lateral cavities can be simultaneously formed in multiple levels such that levels having laterally-extending cavities of a same lateral extent are offset across multiple integrated cavities.