Stepped-Trench Resistor Stack for Smaller Chip Area
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Solution Overview
Problem
Conventional serpentine resistors occupy a large area on semiconductor chips, limiting available space for other devices due to their meandering pattern, and existing resistor devices do not efficiently utilize vertical space to reduce chip area usage.
Innovation Solution
The development of resistor devices featuring a stack of electrically resistive materials within a stepped trench on a semiconductor substrate, where each resistive material is vertically offset, reducing the horizontal area occupied and allowing for more efficient use of chip space by eliminating serpentine patterns.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If serpentine resistors are used to achieve desired resistance values, then resistance functionality is provided, but chip area occupied is large
Solution Approach 1:
The patent transitions from planar serpentine resistor patterns to vertically stacked resistor structures in a stepped trench. By utilizing the vertical dimension (third dimension) instead of only horizontal meandering, the resistor achieves the desired resistance value while occupying significantly less chip area - approximately one-third of the area required by conventional serpentine resistors.
2Area of stationary object
If vertical stacking of resistive materials is implemented, then chip area is reduced, but manufacturing complexity increases
Solution Approach 1:
The resistor structure is segmented into multiple discrete resistive material layers (first, second, and third electrically resistive materials) separated by insulating layers. Each layer can be independently formed and controlled, allowing the complex vertical structure to be built through sequential, manageable fabrication steps rather than a single complex process.
Solution Approach 2:
The patent implements a nested structure where multiple resistive material layers are stacked vertically within a stepped trench. Each resistive layer is nested between insulating layers, and the entire stack is nested within the trench structure. This nesting approach compactly organizes multiple functional layers in a confined vertical space, reducing horizontal footprint while maintaining manufacturability through standard deposition and etching processes.
Data Source
AI summary
Stacks of electrically resistive materials and related apparatuses, electrical systems, and methods are disclosed. An apparatus includes one or more resistor devices including a substrate, first and second electrically resistive materials, and an electrically insulating material between the first and second electrically resistive materials. The substrate includes a semiconductor material. A stepped trench is defined in the substrate by sidewalls and horizontal surfaces of the semiconductor material. The first electrically resistive material and the second electrically resistive material are within the stepped trench. A method of manufacturing a resistor device includes forming a stepped trench in the substrate, forming an etch stop material within the stepped trench, disposing an electrically resistive material within the stepped trench, disposing an electrically insulating material on the electrically resistive material, and repeating the disposing the electrically resistive material and the disposing the electrically insulating material operations a predetermined number of times.